prev_cmp_cnt_fry.map.qmsg

本程序功能是由VHDL语言实现对频率的测量

{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "seg\[4\] cnt_fry.vhd(71) " "Info (10041): Inferred latch for \"seg\[4\]\" at cnt_fry.vhd(71)" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "seg\[5\] cnt_fry.vhd(71) " "Info (10041): Inferred latch for \"seg\[5\]\" at cnt_fry.vhd(71)" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "seg\[6\] cnt_fry.vhd(71) " "Info (10041): Inferred latch for \"seg\[6\]\" at cnt_fry.vhd(71)" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "seg\[7\] cnt_fry.vhd(71) " "Info (10041): Inferred latch for \"seg\[7\]\" at cnt_fry.vhd(71)" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "flag\[0\] cnt_fry.vhd(31) " "Info (10041): Inferred latch for \"flag\[0\]\" at cnt_fry.vhd(31)" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 31 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "flag\[1\] cnt_fry.vhd(31) " "Info (10041): Inferred latch for \"flag\[1\]\" at cnt_fry.vhd(31)" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 31 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "5 " "Info: Inferred 5 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "dat1\[0\]~20 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"dat1\[0\]~20\"" {  } { { "cnt_fry.vhd" "dat1\[0\]~20" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 38 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "dat2\[0\]~20 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"dat2\[0\]~20\"" {  } { { "cnt_fry.vhd" "dat2\[0\]~20" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 38 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "dat3\[0\]~20 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"dat3\[0\]~20\"" {  } { { "cnt_fry.vhd" "dat3\[0\]~20" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 38 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "dat4\[0\]~20 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"dat4\[0\]~20\"" {  } { { "cnt_fry.vhd" "dat4\[0\]~20" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 38 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "dat5\[0\]~20 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: \"dat5\[0\]~20\"" {  } { { "cnt_fry.vhd" "dat5\[0\]~20" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 38 -1 0 } }  } 0 0 "Inferred lpm_counter megafunction (LPM_WIDTH=%2!d!) from the following logic: \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Inferred %1!d! megafunctions from design logic" 0 0 "" 0}
{ "Info" "ILPMS_INFERENCING_SUMMARY" "1 " "Info: Inferred 1 megafunctions from design logic" { { "Info" "ILPMS_LPM_ADD_SUB_INFERRED" "Add0 lpm_add_sub " "Info: Inferred adder/subtractor megafunction (\"lpm_add_sub\") from the following logic: \"Add0\"" {  } { { "cnt_fry.vhd" "Add0" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 23 -1 0 } }  } 0 0 "Inferred adder/subtractor megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Inferred %1!llu! megafunctions from design logic" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf" 248 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_counter:dat1_rtl_0 " "Info: Elaborated megafunction instantiation \"lpm_counter:dat1_rtl_0\"" {  } {  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/alt_counter_f10ke.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_counter_f10ke " "Info: Found entity 1: alt_counter_f10ke" {  } { { "alt_counter_f10ke.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" 268 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_counter:dat1_rtl_0\|alt_counter_f10ke:wysi_counter lpm_counter:dat1_rtl_0 " "Info: Elaborated megafunction instantiation \"lpm_counter:dat1_rtl_0\|alt_counter_f10ke:wysi_counter\", which is child of megafunction instantiation \"lpm_counter:dat1_rtl_0\"" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/lpm_counter.tdf" 425 4 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_counter:dat1_rtl_0 " "Info: Instantiated megafunction \"lpm_counter:dat1_rtl_0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 4 " "Info: Parameter \"LPM_WIDTH\" = \"4\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION UP " "Info: Parameter \"LPM_DIRECTION\" = \"UP\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_TYPE LPM_COUNTER " "Info: Parameter \"LPM_TYPE\" = \"LPM_COUNTER\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } {  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "lpm_add_sub.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/lpm_add_sub.tdf" 102 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"lpm_add_sub:Add0\"" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 23 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/addcore.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/addcore.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 addcore " "Info: Found entity 1: addcore" {  } { { "addcore.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/addcore.tdf" 76 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_sub:Add0\|addcore:adder lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"lpm_add_sub:Add0\|addcore:adder\", which is child of megafunction instantiation \"lpm_add_sub:Add0\"" {  } { { "lpm_add_sub.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/lpm_add_sub.tdf" 268 4 0 } } { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 23 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_add_sub:Add0 " "Info: Instantiated megafunction \"lpm_add_sub:Add0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 10 " "Info: Parameter \"LPM_WIDTH\" = \"10\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_DIRECTION ADD " "Info: Parameter \"LPM_DIRECTION\" = \"ADD\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_REPRESENTATION UNSIGNED " "Info: Parameter \"LPM_REPRESENTATION\" = \"UNSIGNED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "ONE_INPUT_IS_CONSTANT YES " "Info: Parameter \"ONE_INPUT_IS_CONSTANT\" = \"YES\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0}  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 23 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/72/quartus/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/72/quartus/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" {  } { { "a_csnbuffer.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node lpm_add_sub:Add0 " "Info: Elaborated megafunction instantiation \"lpm_add_sub:Add0\|addcore:adder\|a_csnbuffer:oflow_node\", which is child of megafunction instantiation \"lpm_add_sub:Add0\"" {  } { { "addcore.tdf" "" { Text "c:/altera/72/quartus/libraries/megafunctions/addcore.tdf" 97 2 0 } } { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 23 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0 "" 0}