prev_cmp_cnt_fry.tan.qmsg

来自「本程序功能是由VHDL语言实现对频率的测量」· QMSG 代码 · 共 21 行 · 第 1/5 页

{ "Warning" "WTDB_FOUND_COMB_LATCHES" "" "Warning: Timing Analysis found one or more latches implemented as combinational loops" { { "Warning" "WTDB_COMB_LATCH_NODE" "flag\[0\] " "Warning: Node \"flag\[0\]\" is a latch" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 31 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0} { "Warning" "WTDB_COMB_LATCH_NODE" "flag\[1\] " "Warning: Node \"flag\[1\]\" is a latch" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 31 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0} { "Warning" "WTDB_COMB_LATCH_NODE" "seg\[1\]\$latch " "Warning: Node \"seg\[1\]\$latch\" is a latch" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0} { "Warning" "WTDB_COMB_LATCH_NODE" "seg\[2\]\$latch " "Warning: Node \"seg\[2\]\$latch\" is a latch" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0} { "Warning" "WTDB_COMB_LATCH_NODE" "seg\[3\]\$latch " "Warning: Node \"seg\[3\]\$latch\" is a latch" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0} { "Warning" "WTDB_COMB_LATCH_NODE" "seg\[4\]\$latch " "Warning: Node \"seg\[4\]\$latch\" is a latch" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0} { "Warning" "WTDB_COMB_LATCH_NODE" "seg\[5\]\$latch " "Warning: Node \"seg\[5\]\$latch\" is a latch" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0} { "Warning" "WTDB_COMB_LATCH_NODE" "seg\[6\]\$latch " "Warning: Node \"seg\[6\]\$latch\" is a latch" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0} { "Warning" "WTDB_COMB_LATCH_NODE" "seg\[7\]\$latch " "Warning: Node \"seg\[7\]\$latch\" is a latch" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0}  } {  } 0 0 "Timing Analysis found one or more latches implemented as combinational loops" 0 0 "" 0}
{ "Warning" "WTAN_SCC_LOOP" "1 " "Warning: Found combinational loop of 1 nodes" { { "Warning" "WTAN_SCC_NODE" "seg\[7\]\$latch " "Warning: Node \"seg\[7\]\$latch\"" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0}  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0}
{ "Warning" "WTAN_SCC_LOOP" "1 " "Warning: Found combinational loop of 1 nodes" { { "Warning" "WTAN_SCC_NODE" "seg\[6\]\$latch " "Warning: Node \"seg\[6\]\$latch\"" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0}  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0}
{ "Warning" "WTAN_SCC_LOOP" "1 " "Warning: Found combinational loop of 1 nodes" { { "Warning" "WTAN_SCC_NODE" "seg\[5\]\$latch " "Warning: Node \"seg\[5\]\$latch\"" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0}  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0}
{ "Warning" "WTAN_SCC_LOOP" "1 " "Warning: Found combinational loop of 1 nodes" { { "Warning" "WTAN_SCC_NODE" "seg\[4\]\$latch " "Warning: Node \"seg\[4\]\$latch\"" {  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Node \"%1!s!\"" 0 0 "" 0}  } { { "cnt_fry.vhd" "" { Text "J:/VHDL/myprg/Myprg/cnt_fry/cnt_fry.vhd" 71 0 0 } }  } 0 0 "Found combinational loop of %1!d! nodes" 0 0 "" 0}