cnt_fry.map.summary

本程序功能是由VHDL语言实现对频率的测量

Analysis & Synthesis Status : Successful - Thu Nov 27 00:03:05 2008
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : cnt_fry
Top-level Entity Name : cnt_fry
Family : FLEX10K
Total logic elements : 144
Total pins : 17
Total memory bits : 0