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📄 rl_shift.sim.rpt

📁 带有同步预置的加载左右移位寄存器VHDL源代码
💻 RPT
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; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux5|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~0              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~0              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|result_node[0]~0 ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|result_node[0]~0 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|result_node[0]   ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|result_node[0]   ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~5              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~5              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux4|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~0              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~0              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|result_node[0]~0 ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|result_node[0]~0 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|result_node[0]   ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|result_node[0]   ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~5              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~5              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux3|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~0              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~0              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|result_node[0]~0 ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|result_node[0]~0 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|result_node[0]   ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|result_node[0]   ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~5              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~5              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux2|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~0              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~0              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|result_node[0]~0 ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|result_node[0]~0 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|result_node[0]   ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|result_node[0]   ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~5              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~5              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux1|mux_p6c:auto_generated|w_result19w      ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~0              ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~0              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~1              ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~1              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|result_node[0]~0 ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|result_node[0]~0 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~2              ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~2              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~3              ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~3              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|result_node[0]~1 ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|result_node[0]~1 ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|result_node[0]   ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|result_node[0]   ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~4              ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~4              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~5              ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~5              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~6              ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~6              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|w_result19w~0    ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|w_result19w~0    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~7              ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|_~7              ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|w_result19w~1    ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|w_result19w~1    ; out0             ;
; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|w_result19w      ; |RL_SHIFT|lpm_mux:Mux0|mux_p6c:auto_generated|w_result19w      ; out0             ;
+----------------------------------------------------------------+----------------------------------------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version
    Info: Processing started: Mon Dec 22 23:56:15 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off RL_SHIFT -c RL_SHIFT
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is       0.67 %
Info: Number of transitions in simulation is 251
Info: Vector file RL_SHIFT.sim.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Processing ended: Mon Dec 22 23:56:15 2008
    Info: Elapsed time: 00:00:01
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