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来自「基于xilinx ISE环境开发的VHDL的NAND flash ECC 实现,」· 代码 · 共 90 行
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90 行
# Reading D:/Modeltech_6.0/tcl/vsim/pref.tcl
# // ModelSim SE 6.0 Aug 19 2004
# //
# // Copyright Mentor Graphics Corporation 2004
# // All Rights Reserved.
# //
# // THIS WORK CONTAINS TRADE SECRET AND
# // PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# // OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# // AND IS SUBJECT TO LICENSE TERMS.
# //
# do {tb_ecc_vhd.fdo}
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Compiling entity ecctab256
# -- Compiling architecture ecctab256_a of ecctab256
# -- Loading package numeric_std
# -- Loading package textio
# -- Loading entity dist_mem_gen_v3_3
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Compiling entity fifo8x16
# -- Compiling architecture fifo8x16_a of fifo8x16
# -- Loading package iputils_std_logic_arith
# -- Loading package iputils_std_logic_unsigned
# -- Loading package textio
# -- Loading package iputils_conv
# -- Loading package iputils_misc
# -- Loading entity fifo_generator_v3_3_bhv_as
# -- Loading entity fifo_generator_v3_3_bhv_ss
# -- Loading entity fifo_generator_v3_3
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling entity eccgen256byte
# -- Compiling architecture behavioral of eccgen256byte
# Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Loading package numeric_std
# -- Compiling entity tb_ecc_vhd
# -- Compiling architecture behavior of tb_ecc_vhd
# vsim -lib work -t 1ps tb_ecc_vhd
# Loading d:\Modeltech_6.0\win32/../std.standard
# Loading d:\Modeltech_6.0\win32/../ieee.std_logic_1164(body)
# Loading d:\Modeltech_6.0\win32/../ieee.std_logic_arith(body)
# Loading d:\Modeltech_6.0\win32/../ieee.std_logic_unsigned(body)
# Loading d:\Modeltech_6.0\win32/../ieee.numeric_std(body)
# Loading work.tb_ecc_vhd(behavior)
# Loading work.eccgen256byte(behavioral)
# Loading d:\Modeltech_6.0\win32/../std.textio(body)
# Loading work.ecctab256(ecctab256_a)
# Loading D:\Modeltech_6.0\xilib\XilinxCoreLib.dist_mem_gen_v3_3(behavioral)
# Loading D:\Modeltech_6.0\xilib\XilinxCoreLib.iputils_std_logic_arith(body)
# Loading D:\Modeltech_6.0\xilib\XilinxCoreLib.iputils_std_logic_unsigned(body)
# Loading D:\Modeltech_6.0\xilib\XilinxCoreLib.iputils_conv(body)
# Loading D:\Modeltech_6.0\xilib\XilinxCoreLib.iputils_misc(body)
# Loading work.fifo8x16(fifo8x16_a)
# Loading D:\Modeltech_6.0\xilib\XilinxCoreLib.fifo_generator_v3_3(behavioral)
# Loading D:\Modeltech_6.0\xilib\XilinxCoreLib.fifo_generator_v3_3_bhv_ss(behavioral)
# .wave
# .main_pane.workspace
# .main_pane.signals.interior.cs
# ** Warning: This core is supplied with a behavioral model. To model cycle-accurate behavior you must run timing simulation.
# Time: 0 ps Iteration: 0 Instance: /tb_ecc_vhd/uut/inst_ecctab/u0
# ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
# Time: 0 ps Iteration: 1 Instance: /tb_ecc_vhd/uut
# ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
# Time: 0 ps Iteration: 1 Instance: /tb_ecc_vhd/uut
# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
# Time: 0 ps Iteration: 1 Instance: /tb_ecc_vhd/uut/inst_ecctab/u0
do D:/work/eccGen256byte/wave.do
restart -f
run 9us
# ** Warning: This core is supplied with a behavioral model. To model cycle-accurate behavior you must run timing simulation.
# Time: 0 ps Iteration: 0 Instance: /tb_ecc_vhd/uut/inst_ecctab/u0
# ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
# Time: 0 ps Iteration: 1 Instance: /tb_ecc_vhd/uut
# ** Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es).
# Time: 0 ps Iteration: 1 Instance: /tb_ecc_vhd/uut
# ** Warning: NUMERIC_STD.TO_INTEGER: metavalue detected, returning 0
# Time: 0 ps Iteration: 1 Instance: /tb_ecc_vhd/uut/inst_ecctab/u0
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