eccgen256byte.restore

基于xilinx ISE环境开发的VHDL的NAND flash ECC 实现,eccGen256Byte 文件夹为ECC 产生程序

         if {$result == 6} {
            INFO "The file \"$filename\" is already in the project."
         } elseif { $hdl_file == 0 } {
            ERR "A problem occurred adding the file \"$filename\" to the project."
         }
      }
      OnOkPtr hdl_file {
         set ifile [ GetInterface $hdl_file $xilinx::Dpm::IFileID IFile ]
         OnOkPtr ifile {
            set result [ $ifile SetOrigination $origination ]
            if {$result != 1} {
               ERR "A problem occurred setting the origination of \"$filename\" to \"$origination\"."
            }
            Release $ifile
         }
      }
   }
   return 1
}

proc RestoreProjectSettings { iProjHelper project_settings } {
   INFO "Restoring device settings"
   set iScratch [GetScratchPropertyManager $iProjHelper]
   set iPropIter 0
   set iPropSet [ GetInterface $iScratch $xilinx::Dpm::IPropertyNodeSetID IPropertyNodeSet ]
   OnOkPtr iPropSet {
      $iPropSet GetIterator iPropIter
   }
   set index 0
   set lastindex [llength $project_settings]
   ForEachIterEle prop_node $iPropIter {
      set prop_instance 0
      $prop_node GetPropertyInstance prop_instance
      if { $index < $lastindex } {
         set argname [ lindex $project_settings $index ]
         set argvalue [ lindex $project_settings [ expr $index + 1 ] ]
      } else {
         set argname {}
         set argvalue {}
      }
      if { $prop_instance != 0 } {
         set name {}
         $prop_instance GetName name
         if { [string equal $name $argname ] } {
            $prop_instance SetStringValue $argvalue
            incr index
            incr index
         }
      }
      Release $prop_instance
   }
   $iScratch Commit
   # initialize
   $iProjHelper Init
}

#  Helper to load a source control configuration from a stream
#  and then store it back into an ise file.
proc RestoreSourceControlOptions { prjfile istream } {
   INFO "Restoring source control options"
   set config_comp [::Xilinx::Cit::FactoryCreate $::xilinx::Dpm::SourceControlConfigurationCompID ]
   OnOkPtr config_comp { set ipersist [ $config_comp GetInterface $xilinx::Prjrep::IPersistID ] }
   OnOkPtr config_comp { set igetopts [ $config_comp GetInterface $xilinx::Dpm::SrcCtrl::IGetOptionsID ] }
   set helper_comp [::Xilinx::Cit::FactoryCreate $::xilinx::Dpm::SourceControlHelpCompID ]
   OnOkPtr helper_comp { set ihelper [ $config_comp GetInterface $xilinx::Dpm::SrcCtrl::IHelperID ] }
   OnOkPtr ipersist { $ipersist Load istream }
   OnOkPtr ihelper { OnOkPtr igetopts { $ihelper SaveOptions $prjfile $igetopts } }
   Release $helper_comp $config_comp
}

# Call this proc to restore the ISE project.
proc restore { { project_dir "" } } {
   set script_file "eccGen256byte.restore"
   set project_file "eccGen256byte.ise"
   set backup_file "eccGen256byte.fail"
   set old_working_dir [pwd]
   # Make sure a project isn't already open.
   if {[IsProjectOpen]} {
      ERR "The project must be closed before performing this operation."
      cd $old_working_dir
      return
   }
   # If a project directory was supplied, cd into it.
   if {![IsBlank $project_dir]} {
     cd $project_dir
   }
   # Make sure the project isn't locked.
   set lock_file [GetProjectLockFile $project_file]
   if { ![IsBlank "$lock_file" ] } {
      ERR "Could not restore the project \"$project_name\" because it is locked."
      INFO "Please remove the lock file \"$lock_file\" and try again."
      cd $old_working_dir
      return
   }
   # Backup this script because it will be overwritten the next time
   # the project is saved, which happens right after it is created!
   file copy -force "$script_file" "${script_file}.last"
   # Back up the project.
   set wasBackedUp [ BackUpProject "$project_file" "$backup_file" ]
   # Remove the project file, so that it can be recreated, since the old.
   # is presumably corrupted and can no longer be opened.
   OnFail [ RemoveProject "$project_file" ] {
      cd $old_working_dir
      return
   }

   # Open the project.
   HandleException {
      set iProjHelper [ OpenFacilProject "$project_file"]
   } "A problem occurred while creating the project \"$project_file\"."
   if {$iProjHelper == 0} {
      cd $old_working_dir
      return
   }
   INFO "Recreating project \"$project_file\"."
  set project_settings { 
     "PROP_DevFamily" "Virtex2P"
     "PROP_DevDevice" "xc2vp30"
     "PROP_DevPackage" "ff1152"
     "PROP_DevSpeed" "-7"
     "PROP_Top_Level_Module_Type" "HDL"
     "PROP_Synthesis_Tool" "Synplify Pro (VHDL/Verilog)"
     "PROP_Simulator" "Modelsim-SE Mixed"
     "PROP_PreferredLanguage" "VHDL"
     "PROP_Enable_Message_Capture" "true"
     "PROP_Enable_Message_Filtering" "false"
     "PROP_Enable_Incremental_Messaging" "false"
     }

  HandleException {
    RestoreProjectSettings $iProjHelper $project_settings 
  } "A problem occured while restoring project settings."

  set user_files { 
      "FIFO8x16.xco" 
      "eccGen256byte.ucf" 
      "eccGen256byte.vhd" 
      "eccTab256.xco" 
      "tb_ecc.vhd"}

  HandleException {
    AddUserFiles $iProjHelper $user_files
  } "A problem occured while restoring user files."

  set imported_files { 
      "FIFO8x16.asy" 
      "FIFO8x16.ngc" 
      "FIFO8x16.sym" 
      "FIFO8x16.v" 
      "FIFO8x16.veo" 
      "FIFO8x16.vhd" 
      "FIFO8x16.vho" 
      "eccGen256byte.sdc" 
      "eccGen256byte_guide.ncd" 
      "eccTab256.asy" 
      "eccTab256.ngc" 
      "eccTab256.sym" 
      "eccTab256.v" 
      "eccTab256.veo" 
      "eccTab256.vhd" 
      "eccTab256.vho"}

  set origination 2

  HandleException {
    AddImportedFiles $iProjHelper $imported_files $origination
  } "A problem occured while restoring imported files."

  set process_props { 
      "A" "" "" "" "PROPEXT_SynthMultStyle_virtex2" "Auto" 
      "A" "" "" "" "PROPEXT_xilxBitgCfg_DCIUpdateMode_virtex2p" "As Required" 
      "A" "" "" "" "PROPEXT_xilxBitgCfg_TDO_virtex2p" "Float" 
      "A" "" "" "" "PROPEXT_xilxBitgStart_Clk_Done_virtex2p" "Default (4)" 
      "A" "" "" "" "PROPEXT_xilxMapGenInputK_virtex2" "4" 
      "A" "" "" "" "PROPEXT_xilxSynthAddBufg_virtex2" "16" 
      "A" "" "" "" "PROPEXT_xilxSynthMaxFanout_virtex2" "500" 
      "A" "" "" "" "PROP_CPLDFitkeepio" "false" 
      "A" "" "" "" "PROP_CompxlibAbelLib" "true" 
      "A" "" "" "" "PROP_CompxlibCPLDDetLib" "true" 
      "A" "" "" "" "PROP_CompxlibOtherCompxlibOpts" "" 
      "A" "" "" "" "PROP_CompxlibOutputDir" "$XILINX/<language>/<simulator>" 
      "A" "" "" "" "PROP_CompxlibOverwriteLib" "Overwrite" 
      "A" "" "" "" "PROP_CompxlibSimPrimatives" "true" 
      "A" "" "" "" "PROP_CompxlibXlnxCoreLib" "true" 
      "A" "" "" "" "PROP_ConstFileAddOption" "true" 
      "A" "" "" "" "PROP_ConstFileName" "" 
      "A" "" "" "" "PROP_CorgenRegenCore" "Under Current Project Setting" 
      "A" "" "" "" "PROP_CurrentFloorplanFile" "" 
      "A" "" "" "" "PROP_DesignName" "eccGen256byte" 
      "A" "" "" "" "PROP_Dummy" "dum1" 
      "A" "" "" "" "PROP_EnableWYSIWYG" "None" 
      "A" "" "" "" "PROP_Enable_Incremental_Messaging" "false" 
      "A" "" "" "" "PROP_Enable_Message_Capture" "true" 
      "A" "" "" "" "PROP_Enable_Message_Filtering" "false" 
      "A" "" "" "" "PROP_FitterReportFormat" "HTML" 
      "A" "" "" "" "PROP_FlowDebugLevel" "0" 
      "A" "" "" "" "PROP_FunctionBlockInputLimit" "38" 
      "A" "" "" "" "PROP_ImpactProjectFile" "" 
      "A" "" "" "" "PROP_MSimSDFTimingToBeRead" "Setup Time" 
      "A" "" "" "" "PROP_ModelSimUseConfigName" "false" 
      "A" "" "" "" "PROP_Parse_Target" "synthesis" 
      "A" "" "" "" "PROP_PartitionCreateDelete" "" 
      "A" "" "" "" "PROP_PartitionForcePlacement" "" 
      "A" "" "" "" "PROP_PartitionForceSynth" "" 
      "A" "" "" "" "PROP_PartitionForceTranslate" "" 
      "A" "" "" "" "PROP_PlsClockEnable" "true" 
      "A" "" "" "" "PROP_PostTrceFastPath" "false" 
      "A" "" "" "" "PROP_PreTrceFastPath" "false" 
      "A" "" "" "" "PROP_SimDo" "true" 
      "A" "" "" "" "PROP_SimModelGenerateTestbenchFile" "false" 
      "A" "" "" "" "PROP_SimModelInsertBuffersPulseSwallow" "false" 
      "A" "" "" "" "PROP_SimModelOtherNetgenOpts" "" 
      "A" "" "" "" "PROP_SimModelRetainHierarchy" "true" 
      "A" "" "" "" "PROP_SimUseCustom_behav" "false" 
      "A" "" "" "" "PROP_SimUseCustom_postMap" "false" 
      "A" "" "" "" "PROP_SimUseCustom_postPar" "false" 
      "A" "" "" "" "PROP_SimUseCustom_postXlate" "false" 
      "A" "" "" "" "PROP_SynthCaseImplStyle" "None" 
      "A" "" "" "" "PROP_SynthDecoderExtract" "true" 
      "A" "" "" "" "PROP_SynthDisableIOInsertion" "false" 
      "A" "" "" "" "PROP_SynthEncoderExtract" "Yes" 
      "A" "" "" "" "PROP_SynthEnumEncoding" "default" 
      "A" "" "" "" "PROP_SynthExtractMux" "Yes" 
      "A" "" "" "" "PROP_SynthExtractRAM" "true" 
      "A" "" "" "" "PROP_SynthExtractROM" "true" 
      "A" "" "" "" "PROP_SynthFanout" "100" 
      "A" "" "" "" "PROP_SynthFsmEncode" "Auto" 
      "A" "" "" "" "PROP_SynthLogicalShifterExtract" "true" 
      "A" "" "" "" "PROP_SynthModular" "false" 
      "A" "" "" "" "PROP_SynthNumCriticalPaths" "0" 
      "A" "" "" "" "PROP_SynthNumStartEndPoints" "0" 
      "A" "" "" "" "PROP_SynthOpt" "Speed" 
      "A" "" "" "" "PROP_SynthOptEffort" "Normal" 
      "A" "" "" "" "PROP_SynthPipelining" "true" 
      "A" "" "" "" "PROP_SynthProcBound" "true" 
      "A" "" "" "" "PROP_SynthResSharing" "true" 
      "A" "" "" "" "PROP_SynthResourceSharing" "true" 
      "A" "" "" "" "PROP_SynthRetiming" "false" 
      "A" "" "" "" "PROP_SynthShiftRegExtract" "true" 
      "A" "" "" "" "PROP_SynthSymbolicFsm" "true" 
      "A" "" "" "" "PROP_SynthUseFsmExplorerData" "false" 
      "A" "" "" "" "PROP_SynthXORCollapse" "true" 
      "A" "" "" "" "PROP_Top_Level_Module_Type" "HDL" 
      "A" "" "" "" "PROP_UseDataGate" "true" 
      "A" "" "" "" "PROP_UserConstraintEditorPreference" "Constraints Editor" 
      "A" "" "" "" "PROP_UserEditorCustomSetting" "" 
      "A" "" "" "" "PROP_UserEditorPreference" "ISE Text Editor" 
      "A" "" "" "" "PROP_Verilog2001" "true" 
      "A" "" "" "" "PROP_VirtexSynthAutoConstrain" "true" 
      "A" "" "" "" "PROP_WriteVHDLNetlist" "false" 
      "A" "" "" "" "PROP_WriteVendorConstFile" "true" 
      "A" "" "" "" "PROP_WriteVerilogNetlist" "false" 
      "A" "" "" "" "PROP_XPowerOptInputTclScript" "" 
      "A" "" "" "" "PROP_XPowerOptLoadPCFFile" "Default" 
      "A" "" "" "" "PROP_XPowerOptLoadVCDFile" "Default" 
      "A" "" "" "" "PROP_XPowerOptLoadXMLFile" "Default" 
      "A" "" "" "" "PROP_XPowerOptOutputFile" "Default" 
      "A" "" "" "" "PROP_XPowerOptVerboseRpt" "false" 
      "A" "" "" "" "PROP_XPowerOtherXPowerOpts" "" 
      "A" "" "" "" "PROP_XplorerMode" "Off" 
      "A" "" "" "" "PROP_bitgen_Encrypt_keySeq0" "None" 
      "A" "" "" "" "PROP_bitgen_Encrypt_keySeq1" "None" 
      "A" "" "" "" "PROP_bitgen_Encrypt_keySeq2" "None" 
      "A" "" "" "" "PROP_bitgen_Encrypt_keySeq3" "None" 
      "A" "" "" "" "PROP_bitgen_Encrypt_keySeq4" "None" 
      "A" "" "" "" "PROP_bitgen_Encrypt_keySeq5" "None" 
      "A" "" "" "" "PROP_bitgen_Encrypt_startCBC" "" 
      "A" "" "" "" "PROP_bitgen_Encrypt_startKey" "None" 
      "A" "" "" "" "PROP_bitgen_otherCmdLineOptions" "" 
      "A" "" "" "" "PROP_cpldBestFit" "false" 
      "A" "" "" "" "PROP_cpldfitHDLeqStyle" "Source" 
      "A" "" "" "" "PROP_cpldfit_otherCmdLineOptions" "" 
      "A" "" "" "" "PROP_fitGenSimModel" "false" 
      "A" "" "" "" "PROP_hprep6_autosig" "false" 
      "A" "" "" "" "PROP_hprep6_otherCmdLineOptions" "" 
      "A" "" "" "" "PROP_ibiswriterEnableMultiLingualModel" "false" 
      "A" "" "" "" "PROP_ibiswriterShowAllModels" "false" 
      "A" "" "" "" "PROP_impactConfigFileName_CPLD" "" 
      "A" "" "" "" "PROP_mapUseRLOCConstraints" "true" 
      "A" "" "" "" "PROP_map_otherCmdLineOptions" "" 
      "A" "" "" "" "PROP_mpprRsltToCopy" "" 
      "A" "" "" "" "PROP_mpprViewPadRptsForAllRslt" "true" 
      "A" "" "" "" "PROP_mpprViewParRptsForAllRslt" "true" 
      "A" "" "" "" "PROP_ngdbuildUseLOCConstraints" "true" 
      "A" "" "" "" "PROP_ngdbuild_otherCmdLineOptions" "" 
      "A" "" "" "" "PROP_parUseTimingConstraints" "true" 
      "A" "" "" "" "PROP_par_otherCmdLineOptions" "" 
      "A" "" "" "" "PROP_primeCorrelateOutput" "false" 
      "A" "" "" "" "PROP_primeFlatternOutputNetlist" "false" 
      "A" "" "" "" "PROP_primeTopLevelModule" "" 
      "A" "" "" "" "PROP_primetimeBlockRamData" "" 
      "A" "" "" "" "PROP_taengine_otherCmdLineOptions" "" 
      "A" "" "" "" "PROP_xcpldFitDesInit" "Low" 
      "A" "" "" "" "PROP_xcpldFitDesInputLmt_xbr" "32" 
      "A" "" "" "" "PROP_xcpldFitDesMultiLogicOpt" "true" 
      "A" "" "" "" "PROP_xcpldFitDesSlew" "Fast" 
      "A" "" "" "" "PROP_xcpldFitDesTimingCst" "true" 
      "A" "" "" "" "PROP_xcpldFitDesTriMode" "Keeper" 
      "A" "" "" "" "PROP_xcpldFitDesUnused" "Keeper" 
      "A" "" "" "" "PROP_xcpldFitDesVolt" "LVCMOS18" 
      "A" "" "" "" "PROP_xcpldFitTemplate_xpla3" "Optimize Density" 
      "A" "" "" "" "PROP_xcpldFittimRptOption" "Summary" 
      "A" "" "" "" "PROP_xcpldUseGlobalClocks" "true" 
      "A" "" "" "" "PROP_xcpldUseGlobalOutputEnables" "true" 
      "A" "" "" "" "PROP_xcpldUseGlobalSetReset" "true" 
      "A" "" "" "" "PROP_xcpldUseLocConst" "Always" 
      "A" "" "" "" "PROP_xilxBitgCfg_Clk" "Pull Up" 
      "A" "" "" "" "PROP_xilxBitgCfg_Code" "0xFFFFFFFF" 
      "A" "" "" "" "PROP_xilxBitgCfg_DCMBandgap" "false" 
      "A" "" "" "" "PROP_xilxBitgCfg_DCMShutdown" "false" 
      "A" "" "" "" "PROP_xilxBitgCfg_Done" "Pull Up" 
      "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_ASCIIFile" "false" 
      "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_BinaryFile" "false" 
      "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_BitFile" "true" 
      "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_Compress" "false" 
      "A" "" "" "" "PROP_xilxBitgCfg_GenOpt_DRC" "true"