_verilog_hintfile

基于xilinx ISE环境开发的VHDL的NAND flash ECC 实现,eccGen256Byte 文件夹为ECC 产生程序

#OPTIONS:"|-bldtbl|-primux|-fixsmult|-sdff_counter|-infer_seqShift|-nram|-divnmod|-autosm|-fid2|-sharing|on|-encrypt|-ui|-lite|-pro|-ram|-ignore_undefined_lib|-ll|2000|-lib|work|-lib|work"
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\bin\\c_vhdl.exe":1155035930
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\location.map":1150356088
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\std.vhd":1144223808
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\std.vhd":1144223808
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\std.vhd":1144223808
#CUR:"D:\\work1\\eccGen256byte\\eccTab256.vhd":1208158471
#CUR:"D:\\work1\\eccGen256byte\\eccTab256.vhd":1208158471
#CUR:"D:\\work1\\eccGen256byte\\eccTab256.vhd":1208158471
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\std1164.vhd":927285456
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\std1164.vhd":927285456
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\std1164.vhd":927285456
#CUR:"D:\\work1\\eccGen256byte\\eccGen256byte.vhd":1208158964
#CUR:"D:\\work1\\eccGen256byte\\eccGen256byte.vhd":1208158964
#CUR:"D:\\work1\\eccGen256byte\\eccGen256byte.vhd":1208158964
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\arith.vhd":1035356678
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\arith.vhd":1035356678
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\arith.vhd":1035356678
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\unsigned.vhd":1068614572
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\unsigned.vhd":1068614572
#CUR:"d:\\Program Files\\Synplicity\\fpga_862\\lib\\vhd\\unsigned.vhd":1068614572
@E8lFkRDCCtOOC6M.n0L$CM
HbRk0sCC#0
R4HkMb0DRO	
R4HkMb0NR80UNR
bHMkh0R7
R4Fbk0kC0RONOeDRH84k
F00bkROCOBCF8R
.cClM8FD8kCF
l8CkDROCOa.NL6Hn
M0bkRUNR
bHMkO0RD4	R
0FkbRk0JF#bRCU
MF8l8CkD