lib.dls

这是我在ISP编程实验中独立编写的采用结构化描述的四位全加器

DLSL
1
ADDER.VHDLVIEW U9504111.DLS
ADDER-FH1.SYNTHESISVIEW U2695582.DLS
ADDER-FH1.VHDLVIEW U2209581.DLS
F_ADDER.VHDLVIEW U2801992.DLS
F_ADDER-FD1.SYNTHESISVIEW U7224516.DLS
F_ADDER-FD1.VHDLVIEW U4954417.DLS
F_FADD.VHDLVIEW U9984225.DLS
F_FADD-BEHAVIORAL.SYNTHESISVIEW U2715426.DLS
F_FADD-BEHAVIORAL.VHDLVIEW U3545188.DLS
LCD.VHDLVIEW U4143808.DLS
LCD-BEHAVIORAL.SYNTHESISVIEW U3624819.DLS
LCD-BEHAVIORAL.VHDLVIEW U7592957.DLS
LCDF_FADD.VHDLVIEW U2547138.DLS
LCDF_FADD-BEHAVIORAL.SYNTHESISVIEW U6257422.DLS
LCDF_FADD-BEHAVIORAL.VHDLVIEW U5196639.DLS
OR2A.VHDLVIEW U8992700.DLS
OR2A-ONE.SYNTHESISVIEW U9948873.DLS
OR2A-ONE.VHDLVIEW U7277996.DLS