ddr_sdram.csf

基于VHDL编写的DDR-SDRAM控制器的编程

	DQ[15] : LOCATION = Pin_E5;
	DQ[16] : LOCATION = Pin_U6;
	DQ[17] : LOCATION = Pin_E1;
	DQ[18] : LOCATION = Pin_E2;
	DQ[19] : LOCATION = Pin_F1;
	DQ[1] : LOCATION = Pin_J4;
	DQ[20] : LOCATION = Pin_D1;
	DQ[21] : LOCATION = Pin_T5;
	DQ[22] : LOCATION = Pin_J1;
	DQ[23] : LOCATION = Pin_J2;
	DQ[24] : LOCATION = Pin_K1;
	DQ[25] : LOCATION = Pin_K2;
	DQ[26] : LOCATION = Pin_R2;
	DQ[27] : LOCATION = Pin_D2;
	DQ[28] : LOCATION = Pin_R1;
	DQ[29] : LOCATION = Pin_T1;
	DQ[2] : LOCATION = Pin_K3;
	DQ[30] : LOCATION = Pin_T2;
	DQ[31] : LOCATION = Pin_U5;
	DQ[32] : LOCATION = Pin_V2;
	DQ[33] : LOCATION = Pin_U1;
	DQ[34] : LOCATION = Pin_T4;
	DQ[35] : LOCATION = Pin_W1;
	DQ[36] : LOCATION = Pin_W2;
	DQ[37] : LOCATION = Pin_U3;
	DQ[38] : LOCATION = Pin_AC1;
	DQ[39] : LOCATION = Pin_G8;
	DQ[3] : LOCATION = Pin_H3;
	DQ[40] : LOCATION = Pin_V3;
	DQ[41] : LOCATION = Pin_W5;
	DQ[42] : LOCATION = Pin_AC2;
	DQ[43] : LOCATION = Pin_AB5;
	DQ[44] : LOCATION = Pin_AA5;
	DQ[45] : LOCATION = Pin_Y6;
	DQ[46] : LOCATION = Pin_AA6;
	DQ[47] : LOCATION = Pin_AA7;
	DQ[48] : LOCATION = Pin_AF4;
	DQ[49] : LOCATION = Pin_Y3;
	DQ[4] : LOCATION = Pin_H4;
	DQ[50] : LOCATION = Pin_AB7;
	DQ[51] : LOCATION = Pin_AB6;
	DQ[52] : LOCATION = Pin_Y7;
	DQ[53] : LOCATION = Pin_AC6;
	DQ[54] : LOCATION = Pin_AB8;
	DQ[55] : LOCATION = Pin_AF5;
	DQ[56] : LOCATION = Pin_V8;
	DQ[57] : LOCATION = Pin_AF7;
	DQ[58] : LOCATION = Pin_AA8;
	DQ[59] : LOCATION = Pin_E6;
	DQ[5] : LOCATION = Pin_H7;
	DQ[60] : LOCATION = Pin_AC8;
	DQ[61] : LOCATION = Pin_Y8;
	DQ[62] : LOCATION = Pin_AD8;
	DQ[63] : LOCATION = Pin_Y9;
	DQ[6] : LOCATION = Pin_G7;
	DQ[7] : LOCATION = Pin_H5;
	DQ[8] : LOCATION = Pin_G6;
	DQ[9] : LOCATION = Pin_C4;
	RAS_N : LOCATION = Pin_AE10;
	REF1 : LOCATION = Pin_T9;
	REF10 : LOCATION = Pin_P5;
	REF2 : LOCATION = Pin_AE5;
	REF3 : LOCATION = Pin_V4;
	REF4 : LOCATION = Pin_AA1;
	REF5 : LOCATION = Pin_M1;
	REF6 : LOCATION = Pin_G1;
	REF7 : LOCATION = Pin_G3;
	REF8 : LOCATION = Pin_J5;
	REF9 : LOCATION = Pin_F13;
	RESET_N : LOCATION = Pin_H14;
	SA[0] : LOCATION = Pin_T13;
	SA[10] : LOCATION = Pin_AA3;
	SA[11] : LOCATION = Pin_AD4;
	SA[1] : LOCATION = Pin_W14;
	SA[2] : LOCATION = Pin_AB12;
	SA[3] : LOCATION = Pin_AF10;
	SA[4] : LOCATION = Pin_U13;
	SA[5] : LOCATION = Pin_U12;
	SA[6] : LOCATION = Pin_W13;
	SA[7] : LOCATION = Pin_AE11;
	SA[8] : LOCATION = Pin_V13;
	SA[9] : LOCATION = Pin_AC7;
	WE_N : LOCATION = Pin_AF11;
	"ddr_command:command1|OE" : LOCATION = LC10_15_Q2;
	"ddr_data_path_3:data_path4|d2_oe" : LOCATION = LC1_16_Q2;
	"pll1:pll|altclklock:altclklock_component|outclock0" : LOCATION = PLL_3;
	"pll1:pll|altclklock:altclklock_component|outclock1" : LOCATION = PLL_3;
	REF1 : RESERVE_PIN = "AS VREF";
	REF10 : RESERVE_PIN = "AS VREF";
	REF2 : RESERVE_PIN = "AS VREF";
	REF3 : RESERVE_PIN = "AS VREF";
	REF4 : RESERVE_PIN = "AS VREF";
	REF5 : RESERVE_PIN = "AS VREF";
	REF6 : RESERVE_PIN = "AS VREF";
	REF7 : RESERVE_PIN = "AS VREF";
	REF8 : RESERVE_PIN = "AS VREF";
	REF9 : RESERVE_PIN = "AS VREF";
	RESERVE_ALL_UNUSED_PINS = "AS OUTPUT DRIVING GROUND";
	HEXOUT_FILE_COUNT_DIRECTION = UP;
	HEXOUT_FILE_START_ADDRESS = 0;
	GENERATE_HEX_FILE = OFF;
	GENERATE_RBF_FILE = OFF;
	GENERATE_TTF_FILE = OFF;
	RESERVE_DATA7_THROUGH_DATA1_AFTER_CONFIGURATION = OFF;
	RESERVE_RDYNBUSY_AFTER_CONFIGURATION = OFF;
	RESERVE_NWS_NRS_NCS_CS_AFTER_CONFIGURATION = OFF;
	DISABLE_CONF_DONE_AND_NSTATUS_PULLUPS_ON_CONFIG_DEVICE = OFF;
	AUTO_INCREMENT_CONFIG_DEVICE_JTAG_USER_CODE = ON;
	APEX20K_CONFIG_DEVICE_JTAG_USER_CODE = FFFFFFFF;
	APEX20K_CONFIGURATION_DEVICE = EPC2LC20;
	USE_CONFIGURATION_DEVICE = ON;
	ENABLE_INIT_DONE_OUTPUT = OFF;
	ENABLE_DEVICE_WIDE_OE = OFF;
	ENABLE_DEVICE_WIDE_RESET = OFF;
	RELEASE_CLEARS_BEFORE_TRI_STATES = OFF;
	AUTO_RESTART_CONFIGURATION = ON;
	USER_START_UP_CLOCK = OFF;
	APEX20K_CONFIGURATION_SCHEME = "PASSIVE SERIAL";
	APEX20K_JTAG_USER_CODE = FFFFFFFF;
	DEVICE = "EP20K400EFC672-1X";
	"ddr_command:command1|BA[0]" : LOCATION = LC1_7_Z2;
	"ddr_command:command1|BA[1]" : LOCATION = LC10_7_Z2;
	"ddr_command:command1|CAS_N_i" : LOCATION = LC4_8_Z2;
	"ddr_command:command1|CKE" : LOCATION = LC3_1_C4;
	"ddr_command:command1|CM_ACK" : LOCATION = LC5_1_Z2;
	"ddr_command:command1|CS_N[1]" : LOCATION = LC7_7_Z2;
	"ddr_command:command1|CS_N_i[0]" : LOCATION = LC2_7_Z2;
	"ddr_command:command1|G_7_combout" : LOCATION = LC6_15_Z2;
	"ddr_command:command1|G_69" : LOCATION = LC5_16_Z2;
	"ddr_command:command1|G_94" : LOCATION = LC3_9_Z2;
	"ddr_command:command1|G_121" : LOCATION = LC8_6_Z2;
	"ddr_command:command1|N_170_i" : LOCATION = LC5_1_Z2;
	"ddr_command:command1|RAS_N_i" : LOCATION = LC5_8_Z2;
	"ddr_command:command1|REF_ACK" : LOCATION = LC8_9_Z2;
	"ddr_command:command1|SA[0]" : LOCATION = LC7_6_Z2;
	"ddr_command:command1|SA[1]" : LOCATION = LC4_4_Z2;
	"ddr_command:command1|SA[2]" : LOCATION = LC2_12_Z2;
	"ddr_command:command1|SA[3]" : LOCATION = LC7_4_Z2;
	"ddr_command:command1|SA[4]" : LOCATION = LC6_3_Z2;
	"ddr_command:command1|SA[5]" : LOCATION = LC4_15_Q2;
	"ddr_command:command1|SA[6]" : LOCATION = LC1_15_Q2;
	"ddr_command:command1|SA[7]" : LOCATION = LC7_3_Z2;
	"ddr_command:command1|SA[8]" : LOCATION = LC5_5_Z4;
	"ddr_command:command1|SA[9]" : LOCATION = LC6_7_Z2;
	"ddr_command:command1|SA[10]" : LOCATION = LC5_6_Z2;
	"ddr_command:command1|SA[11]" : LOCATION = LC8_7_Z2;
	"ddr_command:command1|WE_N_i" : LOCATION = LC7_8_Z2;
	"ddr_command:command1|cas_n_9_i_and2" : LOCATION = LC10_8_Z2;
	"ddr_command:command1|command_delay[0]" : LOCATION = LC9_1_Z2;
	"ddr_command:command1|command_delay[1]" : LOCATION = LC4_1_Z2;
	"ddr_command:command1|command_delay[2]" : LOCATION = LC1_1_Z2;
	"ddr_command:command1|command_delay[3]" : LOCATION = LC7_1_Z2;
	"ddr_command:command1|command_delay[4]" : LOCATION = LC10_1_Z2;
	"ddr_command:command1|command_delay[5]" : LOCATION = LC2_1_Z2;
	"ddr_command:command1|command_delay[6]" : LOCATION = LC6_1_Z2;
	"ddr_command:command1|command_delay[7]" : LOCATION = LC8_1_Z2;
	"ddr_command:command1|command_done" : LOCATION = LC3_1_Z2;
	"ddr_command:command1|do_load_mode" : LOCATION = LC2_15_Z2;
	"ddr_command:command1|do_precharge" : LOCATION = LC1_15_Z2;
	"ddr_command:command1|do_reada" : LOCATION = LC9_9_Z2;
	"ddr_command:command1|do_refresh" : LOCATION = LC6_9_Z2;
	"ddr_command:command1|do_rw" : LOCATION = LC6_16_Z2;
	"ddr_command:command1|do_writea" : LOCATION = LC1_9_Z2;
	"ddr_command:command1|oe_shift[0]" : LOCATION = LC5_5_Z2;
	"ddr_command:command1|oe_shift[1]" : LOCATION = LC3_5_Z2;
	"ddr_command:command1|oe_shift[2]" : LOCATION = LC7_5_Z2;
	"ddr_command:command1|oe_shift[3]" : LOCATION = LC10_5_Z2;
	"ddr_command:command1|oe_shift_8_1[1]" : LOCATION = LC4_5_Z2;
	"ddr_command:command1|oe_shift_8_2_a1[2]" : LOCATION = LC1_5_Z2;
	"ddr_command:command1|oe1" : LOCATION = LC5_15_Q2;
	"ddr_command:command1|oe2" : LOCATION = LC7_15_Q2;
	"ddr_command:command1|oe3" : LOCATION = LC3_15_Q2;
	"ddr_command:command1|oe4" : LOCATION = LC8_15_Q2;
	"ddr_command:command1|ras_n_9_1_iv_0_and2" : LOCATION = LC6_8_Z2;
	"ddr_command:command1|rp_done" : LOCATION = LC7_9_Z2;
	"ddr_command:command1|rp_shift[0]" : LOCATION = LC2_9_Z2;
	"ddr_command:command1|rp_shift[1]" : LOCATION = LC8_8_Z2;
	"ddr_command:command1|rp_shift[2]" : LOCATION = LC3_8_Z2;
	"ddr_command:command1|rp_shift[3]" : LOCATION = LC1_8_Z2;
	"ddr_command:command1|rw_flag" : LOCATION = LC9_8_Z2;
	"ddr_command:command1|rw_shift[0]" : LOCATION = LC10_16_Z2;
	"ddr_command:command1|rw_shift[1]" : LOCATION = LC9_16_Z2;
	"ddr_command:command1|un1_un13_do_reada_2_i" : LOCATION = LC7_16_Z2;
	"ddr_command:command1|un1_un13_do_reada_6_i" : LOCATION = LC3_16_Z2;
	"ddr_command:command1|un17_ref_req_0_and2_1" : LOCATION = LC5_9_Z2;
	"ddr_command:command1|un22_do_writea1_0_and2" : LOCATION = LC6_5_Z2;
	"ddr_command:command1|un27_do_refresh_0_and2" : LOCATION = LC4_9_Z2;
	"ddr_command:command1|un45_do_refresh_i" : LOCATION = LC10_9_Z2;
	"ddr_command:command1|we_n_9_iv_i_and2_0" : LOCATION = LC2_8_Z2;
	"ddr_control_interface:control1|CMD_ACK" : LOCATION = LC8_2_Z2;
	"ddr_control_interface:control1|G_1_i_and2_0_and2" : LOCATION = LC10_13_Z2;
	"ddr_control_interface:control1|G_736" : LOCATION = LC5_10_Z2;
	"ddr_control_interface:control1|LOAD_MODE" : LOCATION = LC7_15_Z2;
	"ddr_control_interface:control1|PRECHARGE" : LOCATION = LC3_15_Z2;
	"ddr_control_interface:control1|READA" : LOCATION = LC10_15_Z2;
	"ddr_control_interface:control1|REFRESH" : LOCATION = LC5_15_Z2;
	"ddr_control_interface:control1|REF_REQ" : LOCATION = LC5_14_Z2;
	"ddr_control_interface:control1|SADDR[0]" : LOCATION = LC9_6_Z2;
	"ddr_control_interface:control1|SADDR[1]" : LOCATION = LC3_4_Z2;
	"ddr_control_interface:control1|SADDR[2]" : LOCATION = LC3_12_Z2;
	"ddr_control_interface:control1|SADDR[3]" : LOCATION = LC9_4_Z2;
	"ddr_control_interface:control1|SADDR[4]" : LOCATION = LC3_3_Z2;
	"ddr_control_interface:control1|SADDR[5]" : LOCATION = LC6_12_Z2;
	"ddr_control_interface:control1|SADDR[6]" : LOCATION = LC2_15_Q2;
	"ddr_control_interface:control1|SADDR[7]" : LOCATION = LC10_3_Z2;
	"ddr_control_interface:control1|SADDR[8]" : LOCATION = LC2_6_Z2;
	"ddr_control_interface:control1|SADDR[9]" : LOCATION = LC1_4_Z2;
	"ddr_control_interface:control1|SADDR[10]" : LOCATION = LC9_12_Z2;
	"ddr_control_interface:control1|SADDR[11]" : LOCATION = LC5_4_Z2;
	"ddr_control_interface:control1|SADDR[12]" : LOCATION = LC5_3_Z2;
	"ddr_control_interface:control1|SADDR[13]" : LOCATION = LC6_15_Q2;
	"ddr_control_interface:control1|SADDR[14]" : LOCATION = LC9_15_Q2;
	"ddr_control_interface:control1|SADDR[15]" : LOCATION = LC2_3_Z2;
	"ddr_control_interface:control1|SADDR[16]" : LOCATION = LC3_5_Z4;
	"ddr_control_interface:control1|SADDR[17]" : LOCATION = LC9_7_Z2;
	"ddr_control_interface:control1|SADDR[18]" : LOCATION = LC1_6_Z2;
	"ddr_control_interface:control1|SADDR[19]" : LOCATION = LC5_7_Z2;
	"ddr_control_interface:control1|SADDR[20]" : LOCATION = LC4_7_Z2;
	"ddr_control_interface:control1|SADDR[21]" : LOCATION = LC3_7_Z2;
	"ddr_control_interface:control1|SC_BL[0]" : LOCATION = LC9_5_Z2;
	"ddr_control_interface:control1|SC_BL[1]" : LOCATION = LC2_5_Z2;
	"ddr_control_interface:control1|SC_BL[2]" : LOCATION = LC7_2_Z2;
	"ddr_control_interface:control1|SC_BL[3]" : LOCATION = LC9_2_Z2;
	"ddr_control_interface:control1|SC_CL[0]" : LOCATION = LC10_6_Z2;
	"ddr_control_interface:control1|SC_PM" : LOCATION = LC6_6_Z2;
	"ddr_control_interface:control1|SC_RC[0]" : LOCATION = LC6_2_Z2;
	"ddr_control_interface:control1|SC_RC[1]" : LOCATION = LC5_2_Z2;
	"ddr_control_interface:control1|WRITEA" : LOCATION = LC4_15_Z2;
	"ddr_control_interface:control1|load_reg1" : LOCATION = LC8_15_Z2;
	"ddr_control_interface:control1|load_reg2" : LOCATION = LC9_15_Z2;
	"ddr_control_interface:control1|ref_per[0]" : LOCATION = LC7_12_Z2;
	"ddr_control_interface:control1|ref_per[1]" : LOCATION = LC2_4_Z2;
	"ddr_control_interface:control1|ref_per[2]" : LOCATION = LC5_12_Z2;
	"ddr_control_interface:control1|ref_per[3]" : LOCATION = LC6_4_Z2;
	"ddr_control_interface:control1|ref_per[4]" : LOCATION = LC8_3_Z2;
	"ddr_control_interface:control1|ref_per[5]" : LOCATION = LC8_12_Z2;
	"ddr_control_interface:control1|ref_per[6]" : LOCATION = LC5_14_Q2;
	"ddr_control_interface:control1|ref_per[7]" : LOCATION = LC1_3_Z2;
	"ddr_control_interface:control1|ref_per[8]" : LOCATION = LC4_12_Z2;
	"ddr_control_interface:control1|ref_per[9]" : LOCATION = LC10_4_Z2;
	"ddr_control_interface:control1|ref_per[10]" : LOCATION = LC1_12_Z2;
	"ddr_control_interface:control1|ref_per[11]" : LOCATION = LC8_4_Z2;
	"ddr_control_interface:control1|ref_per[12]" : LOCATION = LC9_3_Z2;
	"ddr_control_interface:control1|ref_per[13]" : LOCATION = LC3_14_Q2;
	"ddr_control_interface:control1|ref_per[14]" : LOCATION = LC10_12_Z2;
	"ddr_control_interface:control1|ref_per[15]" : LOCATION = LC4_3_Z2;
	"ddr_control_interface:control1|timer[0]" : LOCATION = LC1_11_Z2;
	"ddr_control_interface:control1|timer[1]" : LOCATION = LC2_11_Z2;
	"ddr_control_interface:control1|timer[2]" : LOCATION = LC3_11_Z2;
	"ddr_control_interface:control1|timer[3]" : LOCATION = LC4_11_Z2;
	"ddr_control_interface:control1|timer[4]" : LOCATION = LC5_11_Z2;
	"ddr_control_interface:control1|timer[5]" : LOCATION = LC6_11_Z2;
	"ddr_control_interface:control1|timer[6]" : LOCATION = LC7_11_Z2;
	"ddr_control_interface:control1|timer[7]" : LOCATION = LC8_11_Z2;
	"ddr_control_interface:control1|timer[8]" : LOCATION = LC9_11_Z2;
	"ddr_control_interface:control1|timer[9]" : LOCATION = LC10_11_Z2;
	"ddr_control_interface:control1|timer[10]" : LOCATION = LC1_13_Z2;
	"ddr_control_interface:control1|timer[11]" : LOCATION = LC2_13_Z2;
	"ddr_control_interface:control1|timer[12]" : LOCATION = LC3_13_Z2;
	"ddr_control_interface:control1|timer[13]" : LOCATION = LC4_13_Z2;