testapp_memoryecc.c

DDR2 Controller DDR2 Controller

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*     (c) Copyright 2006 Xilinx, Inc.
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**************************************************************************/



/**************************************************************************
* Filename:     TestApp_MemoryECC.c
*
* Description:
* This software application demonstrates ECC. The software application first 
* resets the ECCCR, ECCSR, ECCSEC, ECCDEC registers.  Then it sets the ECCCR 
* to either test single or double bit errors.  A memory location in main memory 
* is written (offset 0x4)and read.  Finally, the appropriate counter register 
* (ECCSEC or ECCDEC) is read to insure the counter register is incremented.
* This software application tests both ECC Single and Double Bit Errors. 
*
*
* MODIFICATION HISTORY:
*
* Ver   Who  Date     Changes
* ----- ---- -------- -------------------------------------------------------
* 1.00  jel  7-28-06  Initial Release
*
*
*
******************************************************************************/

/***************************** Include Files *********************************/
#include "xparameters.h"
#include "xio.h"

/************************** Constant Definitions *****************************/
#define ECC_BASEADDR     XPAR_DDR2_SDRAM_32MX64_ECC_BASEADDR                //ECC Base Address for ECC
#define Memory_BASEADDR  XPAR_DDR2_SDRAM_32MX64_MEM0_BASEADDR + 0x00000004  //PLB DDR or PLB DDR2 Base Address

/************************** Function Prototypes ******************************/
void error(void);
static void WriteAndReadMemory(XIo_Address Src, int test);
static void ClearRegisters();
static void WriteToControl(int test);
static void CheckCountReg(int test);
static void CheckStatusReg(int test);

/************************** Variable Defintions ******************************/


//====================================================

int main (void) {
  /* Memory location in main memory to write and read */
  XIo_Address memoryloc;
  /* If issingle is asserted, in single bit error test else double */
  int issingle;

   print("-- Entering main() --\r\n");
   print("\r\n");
	
   memoryloc = Memory_BASEADDR;
	
	print("Starting ECC Testing:\r\n");
	
	/* Single Bit Error Test */
   print(" Starting Single Bit Error Testing:\r\n");
	issingle = 1;
	print("  Writing to Reset Registers...................");
   ClearRegisters();
	print("  Writing to ECCCR.............................");
	WriteToControl(issingle);
   print("  Writing and Checking Memory Location.........");
   WriteAndReadMemory(memoryloc, issingle);
   print("  Checking ECCSR...............................");
	CheckStatusReg(issingle);
	print("  Checking ECCSEC..............................");
	CheckCountReg(issingle);
	
	/* Double Bit Error Test */	
   print(" Starting Double Bit Error Testing:\r\n");	
	issingle = 0;
	print("  Writing to Reset Registers...................");
   ClearRegisters();
	print("  Writing to ECCCR.............................");
	WriteToControl(issingle);
   print("  Writing and Checking Memory Location.........");
   WriteAndReadMemory(memoryloc, issingle);
   print("  Checking ECCSR ..............................");
	CheckStatusReg(issingle);
	print("  Checking ECCDEC..............................");
	CheckCountReg(issingle);	
	
	/* Both Single and Double Bit Tests are successful */
	print("Finished ECC Testing!\r\n");	

	
   print("\r\n");
   /* Setting Register Back To Defaults */
	print("Writing to Reset Registers.....................");
   ClearRegisters();
	print("\r\n");
	
   print("-- Exiting main() --\r\n");
   return 0;
}

void error(void)
{
	while (1);
}

static void ClearRegisters()
{
  int regread;
  
  /* Reset Value for ECC Control Register ECCCR (No Offset 0x0) */
  XIo_Out32(ECC_BASEADDR, 0x00000003);
  regread = XIo_In32(ECC_BASEADDR);
  if(regread != 0x00000003)
    {
      print("Failed\r\n");
      error();
    }
	 
  /* Reset Value for ECC Status Register ECCSR (Offset of 0x4) */
  XIo_Out32(ECC_BASEADDR + 0x00000004, 0x00000000);
  regread = XIo_In32(ECC_BASEADDR + 0x00000004);
  if(regread != 0x00000000)
    {
      print("Failed\r\n");
      error();
    }
  
  /* Reset Value for ECC Single Error Count Register ECCSEC (Offset of 0x8) */
  XIo_Out32(ECC_BASEADDR + 0x00000008, 0x00000000);
  regread = XIo_In32(ECC_BASEADDR + 0x00000008);
  if(regread != 0x00000000)
    {
      print("Failed\r\n");
      error();
    }
	 
  /* Reset Value for ECC Double Error Count Register ECCDEC (Offset of 0xC) */	
  XIo_Out32(ECC_BASEADDR + 0x0000000C, 0x00000000);
  regread = XIo_In32(ECC_BASEADDR + 0x0000000C);
  if(regread != 0x00000000)
    {
      print("Failed\r\n");
      error();
    }	
  /* No Failures In Resetting Register */
  print("Done\r\n");
  
  /* Clear Memory Location To Regenerate Checkbits */
  XIo_Out32(Memory_BASEADDR, 0x00000000);
}

static void WriteAndReadMemory(XIo_Address Src, int test)
{
  /* Compare Memory Values Variables*/ 
  int checkval;
  int memread;
  
  /* Memory Address To Read*/
  XIo_Address MemoryAddr;
  MemoryAddr = Src;
  
  /* Value Written To In Memory */
  checkval = 0xFFFFFFFF;
  
  /* Write To Memory Location */ 
  XIo_Out32(Src, checkval);
  
  /* Read From Memory Location.  If single test,
   * value is equal to written value.  If double test,
   * value is not equal to written value.	
   */	
  memread = XIo_In32(MemoryAddr);

  if (test == 1)
    {
      if(memread != checkval)
	{
	  print("Failed\r\n");
	  error();
	}
      else
	{
	  print("Done\r\n");
	}
    }
  else
    {	
      if(memread == checkval)
	{
	  print("Failed\r\n");
	  error();
	}
      else
	{
	  print("Done\r\n");
	}
    }
}

static void WriteToControl(int test)
{
  int regread;
  
  /* Set ECCCR to Double or Single Bit Error */
  
  if(test == 1)
    {
		
      XIo_Out32(ECC_BASEADDR, 0x00000007);
		regread = XIo_In32(ECC_BASEADDR);
      if(regread != 0x00000007)
	{
	  print("Failed\r\n");
	  error();
	}
    }
  else
    {
		
      XIo_Out32(ECC_BASEADDR, 0x0000000B);
		regread = XIo_In32(ECC_BASEADDR);
      if(regread != 0x0000000B)
	{
	  print("Failed\r\n");
	  error();
	}  
    }
  print("Done\r\n");
}

static void CheckCountReg(int test)
{
  int regread;
  
  /* Check ECCSEC or ECCDEC Registers to see if registers
   * incremented after memory write and read.
	*/
	
  if(test == 1)
    {
		
		/* Check ECCSEC Register for Single Error Test */
		regread = XIo_In32(ECC_BASEADDR + 0x00000008);
      if(regread == 0x00000001)
	{
	  print("Done\r\n");
	}
      else
	{
	  print("Failed\r\n");
	  error();
	}
    }
  else
    {
		
		/* Check ECCDEC Register for Double Error Test */
		regread = XIo_In32(ECC_BASEADDR + 0x0000000C);
      if(regread == 0x00000001)
	{
	  print("Done\r\n");
	}
      else	
	{
	  print("Failed\r\n");
	  error();
	}  
    }
}

static void CheckStatusReg(int test)
{
int regread;
  
  /* Check ECCSEC or ECCDEC Registers to see if registers
   * incremented after memory write and read.
	*/
	
  if(test == 1)
    {
		
		/* Check ECCSEC Register for Single Error Test */
		regread = XIo_In32(ECC_BASEADDR + 0x00000004);
      if(regread == 0x00000219)
	{
	  print("Done\r\n");
	}
      else
	{
	  print("Failed\r\n");
	  error();
	}
    }
  else
    {
		
		/* Check ECCDEC Register for Double Error Test */
		regread = XIo_In32(ECC_BASEADDR + 0x00000004);
      if(regread == 0x00000002)
	{
	  print("Done\r\n");
	}
      else	
	{
	  print("Failed\r\n");
	  error();
	}  
    }
}