watch.fit.eqn

可以实现时间调节

D1L42 = set_clk & D1_clkmin[6] # !set_clk & D1L42;


--E1L52 is minute:u4|i24~0 at LC8_A16
--operation mode is normal

E1L52 = set_clk & E1_clkhour[6] # !set_clk & E1L52;


--K3_unreg_res_node[6] is second:u3|lpm_add_sub:i_rtl_3|addcore:adder|unreg_res_node[6] at LC7_A13
--operation mode is normal

K3_unreg_res_node[6] = M9_cout[5] $ D1_count[6];


--K5_unreg_res_node[6] is second:u3|lpm_add_sub:i_rtl_8|addcore:adder|unreg_res_node[6] at LC7_A19
--operation mode is normal

K5_unreg_res_node[6] = M51_cout[5] $ D1_count[6];


--C1L21 is msecond:u2|i47~97 at LC4_C7
--operation mode is normal

C1L21 = C1L81 & (!C1_count[5] & !C1_count[4] # !C1_count[6]);


--M3_cs_buffer[4] is msecond:u2|lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC5_C9
--operation mode is arithmetic

M3_cs_buffer[4] = C1_count[4] $ M3_cout[3];

--M3_cout[4] is msecond:u2|lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[4] at LC5_C9
--operation mode is arithmetic

M3_cout[4] = CARRY(C1_count[4] & M3_cout[3]);


--M6_cs_buffer[4] is msecond:u2|lpm_add_sub:i_rtl_10|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC5_C6
--operation mode is arithmetic

M6_cs_buffer[4] = C1_count[4] $ M6_cout[3];

--M6_cout[4] is msecond:u2|lpm_add_sub:i_rtl_10|addcore:adder|a_csnbuffer:result_node|cout[4] at LC5_C6
--operation mode is arithmetic

M6_cout[4] = CARRY(C1_count[4] & M6_cout[3]);


--C1L51 is msecond:u2|i49~96 at LC7_C7
--operation mode is normal

C1L51 = M6_cs_buffer[4] & (C1L61 # M3_cs_buffer[4] & C1L21) # !M6_cs_buffer[4] & M3_cs_buffer[4] & C1L21;


--C1L31 is msecond:u2|i47~98 at LC5_C8
--operation mode is normal

C1L31 = K2_unreg_res_node[6] & (C1L61 # C1L21 & K1_unreg_res_node[6]) # !K2_unreg_res_node[6] & C1L21 & K1_unreg_res_node[6];


--M6_cs_buffer[0] is msecond:u2|lpm_add_sub:i_rtl_10|addcore:adder|a_csnbuffer:result_node|cs_buffer[0] at LC1_C6
--operation mode is arithmetic

M6_cs_buffer[0] = C1_count[0];

--M6_cout[0] is msecond:u2|lpm_add_sub:i_rtl_10|addcore:adder|a_csnbuffer:result_node|cout[0] at LC1_C6
--operation mode is arithmetic

M6_cout[0] = CARRY(C1_count[0]);


--M3_cs_buffer[5] is msecond:u2|lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC6_C9
--operation mode is arithmetic

M3_cs_buffer[5] = C1_count[5] $ M3_cout[4];

--M3_cout[5] is msecond:u2|lpm_add_sub:i_rtl_5|addcore:adder|a_csnbuffer:result_node|cout[5] at LC6_C9
--operation mode is arithmetic

M3_cout[5] = CARRY(C1_count[5] & M3_cout[4]);


--M6_cs_buffer[5] is msecond:u2|lpm_add_sub:i_rtl_10|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC6_C6
--operation mode is arithmetic

M6_cs_buffer[5] = C1_count[5] $ M6_cout[4];

--M6_cout[5] is msecond:u2|lpm_add_sub:i_rtl_10|addcore:adder|a_csnbuffer:result_node|cout[5] at LC6_C6
--operation mode is arithmetic

M6_cout[5] = CARRY(C1_count[5] & M6_cout[4]);


--C1L41 is msecond:u2|i48~96 at LC7_C8
--operation mode is normal

C1L41 = M6_cs_buffer[5] & (C1L61 # M3_cs_buffer[5] & C1L21) # !M6_cs_buffer[5] & M3_cs_buffer[5] & C1L21;


--B1L6 is any_even:u1|i~327 at LC3_B7
--operation mode is normal

B1L6 = !H1_q[10] & H1_q[8] & H1_q[9] & H1_q[11];


--B1L8 is any_even:u1|i~331 at LC4_B7
--operation mode is normal

B1L8 = (!H1_q[12] & !H1_q[13] & !H1_q[15] & H1_q[14]) & CASCADE(B1L6);


--B1L7 is any_even:u1|i~329 at LC7_B3
--operation mode is normal

B1L7 = !H1_q[0] & H1_q[1] & H1_q[2] & H1_q[3];


--B1L9 is any_even:u1|i~332 at LC8_B3
--operation mode is normal

B1L9 = (!H1_q[6] & !H1_q[7] & H1_q[4] & H1_q[5]) & CASCADE(B1L7);


--M21_cs_buffer[5] is second:u3|lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC7_B14
--operation mode is arithmetic

M21_cs_buffer[5] = D1_clkmin[5] $ M21_cout[4];

--M21_cout[5] is second:u3|lpm_add_sub:i_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[5] at LC7_B14
--operation mode is arithmetic

M21_cout[5] = CARRY(D1_clkmin[5] & M21_cout[4]);


--M81_cs_buffer[5] is second:u3|lpm_add_sub:i_rtl_9|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC6_B15
--operation mode is arithmetic

M81_cs_buffer[5] = D1_clkmin[5] $ M81_cout[4];

--M81_cout[5] is second:u3|lpm_add_sub:i_rtl_9|addcore:adder|a_csnbuffer:result_node|cout[5] at LC6_B15
--operation mode is arithmetic

M81_cout[5] = CARRY(D1_clkmin[5] & M81_cout[4]);


--D1L64 is second:u3|i123~96 at LC7_B13
--operation mode is normal

D1L64 = M81_cs_buffer[5] & (D1L94 # M21_cs_buffer[5] & D1L74) # !M81_cs_buffer[5] & M21_cs_buffer[5] & D1L74;


--D1L54 is second:u3|i122~96 at LC8_B13
--operation mode is normal

D1L54 = K6_unreg_res_node[6] & (D1L94 # K4_unreg_res_node[6] & D1L74) # !K6_unreg_res_node[6] & K4_unreg_res_node[6] & D1L74;


--M12_cs_buffer[5] is minute:u4|lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC6_A7
--operation mode is arithmetic

M12_cs_buffer[5] = E1_clkhour[5] $ M12_cout[4];

--M12_cout[5] is minute:u4|lpm_add_sub:i_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[5] at LC6_A7
--operation mode is arithmetic

M12_cout[5] = CARRY(E1_clkhour[5] & M12_cout[4]);


--M03_cs_buffer[5] is minute:u4|lpm_add_sub:i_rtl_7|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC6_A8
--operation mode is arithmetic

M03_cs_buffer[5] = E1_clkhour[5] $ M03_cout[4];

--M03_cout[5] is minute:u4|lpm_add_sub:i_rtl_7|addcore:adder|a_csnbuffer:result_node|cout[5] at LC6_A8
--operation mode is arithmetic

M03_cout[5] = CARRY(E1_clkhour[5] & M03_cout[4]);


--E1L34 is minute:u4|i134~91 at LC5_A1
--operation mode is normal

E1L34 = E1L64 & M12_cs_buffer[5] # !E1L64 & M03_cs_buffer[5];


--E1L24 is minute:u4|i133~91 at LC7_A1
--operation mode is normal

E1L24 = E1L64 & K7_unreg_res_node[6] # !E1L64 & K01_unreg_res_node[6];


--F1L52 is act:u5|i82~562 at LC1_C13
--operation mode is normal

F1L52 = F1L76 # set_clk & !E1_clkhour[6] # !set_clk & !E1_count[6];


--F1L72 is act:u5|i82~565 at LC2_C13
--operation mode is normal

F1L72 = (set_clk & !D1_clkmin[6] # !set_clk & !D1_count[6] # !F1L42) & CASCADE(F1L52);


--F1L03 is act:u5|i83~536 at LC2_C16
--operation mode is normal

F1L03 = F1L76 # set_clk & !E1_clkhour[5] # !set_clk & !E1_count[5];


--F1L23 is act:u5|i83~539 at LC3_C16
--operation mode is normal

F1L23 = (set_clk & !D1_clkmin[5] # !set_clk & !D1_count[5] # !F1L42) & CASCADE(F1L03);


--K1_unreg_res_node[6] is msecond:u2|lpm_add_sub:i_rtl_5|addcore:adder|unreg_res_node[6] at LC7_C9
--operation mode is normal

K1_unreg_res_node[6] = M3_cout[5] $ C1_count[6];


--K2_unreg_res_node[6] is msecond:u2|lpm_add_sub:i_rtl_10|addcore:adder|unreg_res_node[6] at LC7_C6
--operation mode is normal

K2_unreg_res_node[6] = M6_cout[5] $ C1_count[6];


--K4_unreg_res_node[6] is second:u3|lpm_add_sub:i_rtl_4|addcore:adder|unreg_res_node[6] at LC8_B14
--operation mode is normal

K4_unreg_res_node[6] = M21_cout[5] $ D1_clkmin[6];


--K6_unreg_res_node[6] is second:u3|lpm_add_sub:i_rtl_9|addcore:adder|unreg_res_node[6] at LC7_B15
--operation mode is normal

K6_unreg_res_node[6] = M81_cout[5] $ D1_clkmin[6];


--K7_unreg_res_node[6] is minute:u4|lpm_add_sub:i_rtl_1|addcore:adder|unreg_res_node[6] at LC7_A7
--operation mode is normal

K7_unreg_res_node[6] = M12_cout[5] $ E1_clkhour[6];


--K01_unreg_res_node[6] is minute:u4|lpm_add_sub:i_rtl_7|addcore:adder|unreg_res_node[6] at LC7_A8
--operation mode is normal

K01_unreg_res_node[6] = M03_cout[5] $ E1_clkhour[6];


--F1L06 is act:u5|i224~121 at LC2_A10
--operation mode is normal

F1L06 = F1_num[3] & !F1_num[2] & !F1_num[1] # !F1_num[3] & (F1_num[1] # F1_num[0] & F1_num[2]);


--F1L5 is act:u5|daout1[0]~6 at LC1_A10
--operation mode is normal

F1L5 = F1L26 # F1L06;


--F1L75 is act:u5|i223~98 at LC6_A11
--operation mode is normal

F1L75 = F1_num[2] & !F1_num[3] & (F1_num[0] $ !F1_num[1]) # !F1_num[2] & (!F1_num[3] # !F1_num[1]);


--F1L85 is act:u5|i223~99 at LC8_A11
--operation mode is normal

F1L85 = F1_num[3] # F1_num[0] $ !F1_num[1] # !F1_num[2];


--F1L6 is act:u5|daout1[1]~5 at LC3_A11
--operation mode is normal

F1L6 = F1L6 & F1L85 # !F1L6 & F1L75;


--F1L25 is act:u5|i221~228 at LC5_A10
--operation mode is normal

F1L25 = F1_num[2] & (F1L8 # !F1_num[1] & !F1_num[3]) # !F1_num[2] & F1_num[3] & F1L8;


--F1L35 is act:u5|i221~229 at LC8_A10
--operation mode is normal

F1L35 = F1_num[1] & (F1_num[3] & F1L8 # !F1_num[3] & F1_num[2]) # !F1_num[1] & (F1L8 # !F1_num[2] & !F1_num[3]);


--F1L15 is act:u5|i221~227 at LC6_A10
--operation mode is normal

F1L15 = F1_num[0] & F1L35 # !F1_num[0] & F1L25;


--F1L21 is act:u5|dot~5 at LC8_C24
--operation mode is normal

F1L21 = !clr;


--B1L2 is any_even:u1|clk_outQ~1 at LC1_B10
--operation mode is normal

B1L2 = !B1L3;


--C1L6 is msecond:u2|count[3]~146 at LC2_C10
--operation mode is normal

C1L6 = !set;


--set_clk is set_clk at Pin_8
--operation mode is input

set_clk = INPUT();


--clk1 is clk1 at Pin_2
--operation mode is input

clk1 = INPUT();


--set_hour is set_hour at Pin_44
--operation mode is input

set_hour = INPUT();


--en is en at Pin_6
--operation mode is input

en = INPUT();


--clr is clr at Pin_3
--operation mode is input

clr = INPUT();


--set_fun is set_fun at Pin_7
--operation mode is input

set_fun = INPUT();


--set_min is set_min at Pin_84
--operation mode is input

set_min = INPUT();


--set is set at Pin_5
--operation mode is input

set = INPUT();


--clk is clk at Pin_1
--operation mode is input

clk = INPUT();


--ss is ss at Pin_24
--operation mode is output

ss = OUTPUT(F1L31Q);


--alarm is alarm at Pin_53
--operation mode is output

alarm = OUTPUT(!A1L9);


--selout[5] is selout[5] at Pin_78
--operation mode is output

selout[5] = OUTPUT(F1_sel[5]);


--selout[4] is selout[4] at Pin_79
--operation mode is output

selout[4] = OUTPUT(F1_sel[4]);


--selout[3] is selout[3] at Pin_80
--operation mode is output

selout[3] = OUTPUT(F1_sel[3]);


--selout[2] is selout[2] at Pin_81
--operation mode is output

selout[2] = OUTPUT(F1_sel[2]);


--selout[1] is selout[1] at Pin_10
--operation mode is output

selout[1] = OUTPUT(F1_sel[1]);


--selout[0] is selout[0] at Pin_11
--operation mode is output

selout[0] = OUTPUT(F1_sel[0]);


--led[6] is led[6] at Pin_23
--operation mode is output

led[6] = OUTPUT(F1L11);


--led[5] is led[5] at Pin_22
--operation mode is output

led[5] = OUTPUT(!F1L01);


--led[4] is led[4] at Pin_21
--operation mode is output

led[4] = OUTPUT(F1L9);


--led[3] is led[3] at Pin_19
--operation mode is output

led[3] = OUTPUT(!F1L8);


--led[2] is led[2] at Pin_18
--operation mode is output

led[2] = OUTPUT(F1L7);


--led[1] is led[1] at Pin_17
--operation mode is output

led[1] = OUTPUT(F1L6);


--led[0] is led[0] at Pin_16
--operation mode is output

led[0] = OUTPUT(F1L5);