📄 dds_new.hif
字号:
Version 7.2 Build 151 09/26/2007 SJ Full Version
11
1009
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
dds_new
# storage
db|dds_new.(0).cnf
db|dds_new.(0).cnf
# case_insensitive
# source_file
dds_new.bdf
7cb4402b2c64f52e1c1c947d5628bfc
25
# internal_option {
BLOCK_DESIGN_NAMING
OFF
}
# hierarchies {
|
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence
# end
# entity
add
# storage
db|dds_new.(1).cnf
db|dds_new.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
add.v
2e66f61563fe97396896d967631bf
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
add:inst1
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence
# end
# entity
lpm_add_sub
# storage
db|dds_new.(2).cnf
db|dds_new.(2).cnf
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.tdf
27499108f101795be9906469b3cba3
6
# user_parameter {
LPM_WIDTH
32
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
DEF
LPM_DIRECTION
ADD
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_0pe
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
}
# include_file {
d:|altera|72|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
d:|altera|72|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
d:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
d:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
d:|altera|72|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
d:|altera|72|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# hierarchies {
add:inst1|lpm_add_sub:lpm_add_sub_component
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence
# end
# entity
add_sub_0pe
# storage
db|dds_new.(3).cnf
db|dds_new.(3).cnf
# case_insensitive
# source_file
db|add_sub_0pe.tdf
a2b53dc8e0a0a45389e366ac1e77bc7a
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab31
-1
3
datab30
-1
3
datab3
-1
3
datab29
-1
3
datab28
-1
3
datab27
-1
3
datab26
-1
3
datab25
-1
3
datab24
-1
3
datab23
-1
3
datab22
-1
3
datab21
-1
3
datab20
-1
3
datab2
-1
3
datab19
-1
3
datab18
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa31
-1
3
dataa30
-1
3
dataa3
-1
3
dataa29
-1
3
dataa28
-1
3
dataa27
-1
3
dataa26
-1
3
dataa25
-1
3
dataa24
-1
3
dataa23
-1
3
dataa22
-1
3
dataa21
-1
3
dataa20
-1
3
dataa2
-1
3
dataa19
-1
3
dataa18
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
}
# hierarchies {
add:inst1|lpm_add_sub:lpm_add_sub_component|add_sub_0pe:auto_generated
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence
# end
# entity
acc
# storage
db|dds_new.(4).cnf
db|dds_new.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
acc.v
11beab546c724a5a61a48368a9b89d10
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
acc:inst
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence
# end
# entity
lpm_add_sub
# storage
db|dds_new.(5).cnf
db|dds_new.(5).cnf
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|lpm_add_sub.tdf
27499108f101795be9906469b3cba3
6
# user_parameter {
LPM_WIDTH
32
PARAMETER_SIGNED_DEC
USR
LPM_REPRESENTATION
SIGNED
PARAMETER_UNKNOWN
DEF
LPM_DIRECTION
ADD
PARAMETER_UNKNOWN
USR
ONE_INPUT_IS_CONSTANT
NO
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
1
PARAMETER_SIGNED_DEC
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
REGISTERED_AT_END
0
PARAMETER_UNKNOWN
DEF
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
USE_CS_BUFFERS
1
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
USE_WYS
OFF
PARAMETER_UNKNOWN
DEF
STYLE
FAST
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
add_sub_q4h
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
result
-1
3
datab
-1
3
dataa
-1
3
clock
-1
3
aclr
-1
3
}
# include_file {
d:|altera|72|quartus|libraries|megafunctions|addcore.inc
ff795e21e4847824c03218724f1a1252
d:|altera|72|quartus|libraries|megafunctions|look_add.inc
ab9f577d30c5ef3166fab6c1c32c4a
d:|altera|72|quartus|libraries|megafunctions|bypassff.inc
8e8df160d449a63ec15dc86ecf2b373f
d:|altera|72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
d:|altera|72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
d:|altera|72|quartus|libraries|megafunctions|alt_stratix_add_sub.inc
c08f604aefba5b4f1f554e565113c6
d:|altera|72|quartus|libraries|megafunctions|alt_mercury_add_sub.inc
ae39f15ed67cc9a095d29f68f6ad0f8
}
# hierarchies {
acc:inst|lpm_add_sub:lpm_add_sub_component
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence
# end
# entity
add_sub_q4h
# storage
db|dds_new.(6).cnf
db|dds_new.(6).cnf
# case_insensitive
# source_file
db|add_sub_q4h.tdf
87d5fd9afe68d7a3e0756708ac1f7
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result31
-1
3
result30
-1
3
result3
-1
3
result29
-1
3
result28
-1
3
result27
-1
3
result26
-1
3
result25
-1
3
result24
-1
3
result23
-1
3
result22
-1
3
result21
-1
3
result20
-1
3
result2
-1
3
result19
-1
3
result18
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab31
-1
3
datab30
-1
3
datab3
-1
3
datab29
-1
3
datab28
-1
3
datab27
-1
3
datab26
-1
3
datab25
-1
3
datab24
-1
3
datab23
-1
3
datab22
-1
3
datab21
-1
3
datab20
-1
3
datab2
-1
3
datab19
-1
3
datab18
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa31
-1
3
dataa30
-1
3
dataa3
-1
3
dataa29
-1
3
dataa28
-1
3
dataa27
-1
3
dataa26
-1
3
dataa25
-1
3
dataa24
-1
3
dataa23
-1
3
dataa22
-1
3
dataa21
-1
3
dataa20
-1
3
dataa2
-1
3
dataa19
-1
3
dataa18
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
acc:inst|lpm_add_sub:lpm_add_sub_component|add_sub_q4h:auto_generated
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence
# end
# entity
pll4
# storage
db|dds_new.(7).cnf
db|dds_new.(7).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
pll4.v
70cf527bd2348e34490be776b380f7
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
pll4:inst4
}
# lmf
d:|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence
# end
# entity
altpll
# storage
db|dds_new.(8).cnf
db|dds_new.(8).cnf
# case_insensitive
# source_file
d:|altera|72|quartus|libraries|megafunctions|altpll.tdf
d4b92ea4fba4c49118598123ca13cf
6
# user_parameter {
OPERATION_MODE
NORMAL
PARAMETER_UNKNOWN
USR
PLL_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
QUALIFY_CONF_DONE
OFF
PARAMETER_UNKNOWN
DEF
COMPENSATE_CLOCK
CLK0
PARAMETER_UNKNOWN
USR
SCAN_CHAIN
LONG
PARAMETER_UNKNOWN
DEF
PRIMARY_CLOCK
INCLK0
PARAMETER_UNKNOWN
DEF
INCLK0_INPUT_FREQUENCY
50000
PARAMETER_SIGNED_DEC
USR
INCLK1_INPUT_FREQUENCY
0
PARAMETER_UNKNOWN
DEF
GATE_LOCK_SIGNAL
NO
PARAMETER_UNKNOWN
DEF
GATE_LOCK_COUNTER
0
PARAMETER_UNKNOWN
DEF
LOCK_HIGH
1
PARAMETER_UNKNOWN
DEF
LOCK_LOW
1
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