dds_new.sim.rpt

来自「驱动时钟加入了PLL,使得DDS的驱动时钟可变.32位的NCO使得DDS的分辨率」· RPT 代码 · 共 337 行 · 第 1/5 页

RPT
337
字号
; |dds_new|freq[21]                                                                                                          ; |dds_new|freq[21]                                                                                                          ; out              ;
; |dds_new|freq[20]                                                                                                          ; |dds_new|freq[20]                                                                                                          ; out              ;
; |dds_new|freq[19]                                                                                                          ; |dds_new|freq[19]                                                                                                          ; out              ;
; |dds_new|freq[18]                                                                                                          ; |dds_new|freq[18]                                                                                                          ; out              ;
; |dds_new|freq[17]                                                                                                          ; |dds_new|freq[17]                                                                                                          ; out              ;
; |dds_new|freq[16]                                                                                                          ; |dds_new|freq[16]                                                                                                          ; out              ;
; |dds_new|freq[15]                                                                                                          ; |dds_new|freq[15]                                                                                                          ; out              ;
; |dds_new|freq[14]                                                                                                          ; |dds_new|freq[14]                                                                                                          ; out              ;
; |dds_new|freq[13]                                                                                                          ; |dds_new|freq[13]                                                                                                          ; out              ;
; |dds_new|freq[12]                                                                                                          ; |dds_new|freq[12]                                                                                                          ; out              ;
; |dds_new|freq[11]                                                                                                          ; |dds_new|freq[11]                                                                                                          ; out              ;
; |dds_new|freq[10]                                                                                                          ; |dds_new|freq[10]                                                                                                          ; out              ;
; |dds_new|freq[9]                                                                                                           ; |dds_new|freq[9]                                                                                                           ; out              ;
; |dds_new|freq[8]                                                                                                           ; |dds_new|freq[8]                                                                                                           ; out              ;
; |dds_new|freq[7]                                                                                                           ; |dds_new|freq[7]                                                                                                           ; out              ;
; |dds_new|freq[6]                                                                                                           ; |dds_new|freq[6]                                                                                                           ; out              ;
; |dds_new|freq[5]                                                                                                           ; |dds_new|freq[5]                                                                                                           ; out              ;
; |dds_new|freq[4]                                                                                                           ; |dds_new|freq[4]                                                                                                           ; out              ;
; |dds_new|freq[3]                                                                                                           ; |dds_new|freq[3]                                                                                                           ; out              ;
; |dds_new|freq[2]                                                                                                           ; |dds_new|freq[2]                                                                                                           ; out              ;
; |dds_new|freq[1]                                                                                                           ; |dds_new|freq[1]                                                                                                           ; out              ;
; |dds_new|freq[0]                                                                                                           ; |dds_new|freq[0]                                                                                                           ; out              ;
; |dds_new|sinout[11]                                                                                                        ; |dds_new|sinout[11]                                                                                                        ; pin_out          ;
; |dds_new|sinout[10]                                                                                                        ; |dds_new|sinout[10]                                                                                                        ; pin_out          ;
; |dds_new|sinout[9]                                                                                                         ; |dds_new|sinout[9]                                                                                                         ; pin_out          ;
; |dds_new|sinout[8]                                                                                                         ; |dds_new|sinout[8]                                                                                                         ; pin_out          ;
; |dds_new|sinout[7]                                                                                                         ; |dds_new|sinout[7]                                                                                                         ; pin_out          ;
; |dds_new|sinout[6]                                                                                                         ; |dds_new|sinout[6]                                                                                                         ; pin_out          ;
; |dds_new|sinout[5]                                                                                                         ; |dds_new|sinout[5]                                                                                                         ; pin_out          ;
; |dds_new|sinout[4]                                                                                                         ; |dds_new|sinout[4]                                                                                                         ; pin_out          ;
; |dds_new|sinout[3]                                                                                                         ; |dds_new|sinout[3]                                                                                                         ; pin_out          ;
; |dds_new|sinout[2]                                                                                                         ; |dds_new|sinout[2]                                                                                                         ; pin_out          ;
; |dds_new|sinout[1]                                                                                                         ; |dds_new|sinout[1]                                                                                                         ; pin_out          ;
; |dds_new|sinout[0]                                                                                                         ; |dds_new|sinout[0]                                                                                                         ; pin_out          ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a0                          ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a0                          ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a1                          ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a1                          ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a2                          ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a2                          ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a3                          ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a3                          ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a4                          ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a4                          ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a5                          ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a5                          ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a6                          ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a6                          ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a7                          ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a7                          ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a8                          ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a8                          ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a9                          ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a9                          ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a10                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a10                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a11                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a11                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a12                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a12                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a13                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a13                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a14                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a14                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a15                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a15                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a16                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a16                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a17                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a17                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a18                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a18                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a19                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a19                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a20                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a20                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a21                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a21                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a22                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a22                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a23                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a23                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a24                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a24                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a25                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a25                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a26                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a26                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a27                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a27                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a28                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a28                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a29                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a29                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a30                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a30                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a31                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a31                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a32                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a32                         ; portadataout0    ;
; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a33                         ; |dds_new|sinrom:inst3|altsyncram:altsyncram_component|altsyncram_5071:auto_generated|ram_block1a33                         ; portadataout0    ;

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