sine.sim.rpt

来自「原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm」· RPT 代码 · 共 284 行 · 第 1/5 页

; |sine|sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                               ; |sine|sld_hub:sld_hub_inst|jtag_debug_mode_usr1                                                                                                                               ; regout           ;
; |sine|sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                           ; |sine|sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]                                                                                                                           ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|name_gen~33                                                            ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|name_gen~33                                                            ; combout          ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|enable_write~11                                                        ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|enable_write~11                                                        ; combout          ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[1]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[2]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[3]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[4]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[5]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[6]                                                    ; regout           ;
; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                    ; |sine|rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]                                                    ; regout           ;
; |sine|sld_hub:sld_hub_inst|hub_tdo                                                                                                                                            ; |sine|sld_hub:sld_hub_inst|hub_tdo                                                                                                                                            ; regout           ;
; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3]                                                                                                 ; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3]                                                                                                 ; regout           ;
; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4]                                                                                                 ; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4]                                                                                                 ; regout           ;
; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~14                                                                                                 ; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~14                                                                                                 ; combout          ;
; |sine|sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[2]                                                                                                             ; |sine|sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[2]                                                                                                             ; regout           ;
; |sine|sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[2]                                                                                                                                ; |sine|sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[2]                                                                                                                                ; regout           ;
; |sine|sld_hub:sld_hub_inst|IRF_D[1][2]~45                                                                                                                                     ; |sine|sld_hub:sld_hub_inst|IRF_D[1][2]~45                                                                                                                                     ; combout          ;
; |sine|sld_hub:sld_hub_inst|CLRN_SIGNAL                                                                                                                                        ; |sine|sld_hub:sld_hub_inst|CLRN_SIGNAL                                                                                                                                        ; regout           ;
; |sine|sld_hub:sld_hub_inst|OK_TO_UPDATE_IR_Q                                                                                                                                  ; |sine|sld_hub:sld_hub_inst|OK_TO_UPDATE_IR_Q                                                                                                                                  ; regout           ;
; |sine|sld_hub:sld_hub_inst|GEN_SHADOW_IRF~9                                                                                                                                   ; |sine|sld_hub:sld_hub_inst|GEN_SHADOW_IRF~9                                                                                                                                   ; combout          ;
; |sine|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]                                                                                                                           ; |sine|sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]                                                                                                                           ; regout           ;
; |sine|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[2]                                                                                 ; |sine|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[2]                                                                                 ; regout           ;
; |sine|sld_hub:sld_hub_inst|IRF_ENABLE[1]~64                                                                                                                                   ; |sine|sld_hub:sld_hub_inst|IRF_ENABLE[1]~64                                                                                                                                   ; combout          ;
; |sine|sld_hub:sld_hub_inst|IRF_ENABLE[1]~65                                                                                                                                   ; |sine|sld_hub:sld_hub_inst|IRF_ENABLE[1]~65                                                                                                                                   ; combout          ;
; |sine|sld_hub:sld_hub_inst|jtag_debug_mode_usr0                                                                                                                               ; |sine|sld_hub:sld_hub_inst|jtag_debug_mode_usr0                                                                                                                               ; regout           ;
; |sine|sld_hub:sld_hub_inst|jtag_debug_mode~2                                                                                                                                  ; |sine|sld_hub:sld_hub_inst|jtag_debug_mode~2                                                                                                                                  ; combout          ;
; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[12]                                                                                                ; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[12]                                                                                                ; regout           ;
; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[2]                                                                                                 ; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[2]                                                                                                 ; regout           ;
; |sine|sld_hub:sld_hub_inst|jtag_debug_mode~171                                                                                                                                ; |sine|sld_hub:sld_hub_inst|jtag_debug_mode~171                                                                                                                                ; combout          ;
; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[15]                                                                                                ; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[15]                                                                                                ; regout           ;
; |sine|sld_hub:sld_hub_inst|jtag_debug_mode~172                                                                                                                                ; |sine|sld_hub:sld_hub_inst|jtag_debug_mode~172                                                                                                                                ; combout          ;
; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0]                                                                                                 ; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0]                                                                                                 ; regout           ;
; |sine|sld_hub:sld_hub_inst|IRF_ENA_ENABLE~21                                                                                                                                  ; |sine|sld_hub:sld_hub_inst|IRF_ENA_ENABLE~21                                                                                                                                  ; combout          ;
; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[1]                                                                                                              ; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[1]                                                                                                              ; regout           ;
; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[9]                                                                                                              ; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[9]                                                                                                              ; regout           ;
; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[8]                                                                                                              ; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[8]                                                                                                              ; regout           ;
; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[7]                                                                                                              ; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[7]                                                                                                              ; regout           ;
; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[6]                                                                                                              ; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[6]                                                                                                              ; regout           ;
; |sine|rtl~76                                                                                                                                                                  ; |sine|rtl~76                                                                                                                                                                  ; combout          ;
; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[3]                                                                                                              ; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[3]                                                                                                              ; regout           ;
; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[2]                                                                                                              ; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[2]                                                                                                              ; regout           ;
; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[5]                                                                                                              ; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[5]                                                                                                              ; regout           ;
; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[4]                                                                                                              ; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[4]                                                                                                              ; regout           ;
; |sine|rtl~77                                                                                                                                                                  ; |sine|rtl~77                                                                                                                                                                  ; combout          ;
; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[0]                                                                                                              ; |sine|sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[0]                                                                                                              ; regout           ;
; |sine|rtl~0                                                                                                                                                                   ; |sine|rtl~0                                                                                                                                                                   ; combout          ;
; |sine|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[1]                                                                                 ; |sine|sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[1]                                                                                 ; regout           ;
; |sine|sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]~52                                                                                                                        ; |sine|sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]~52                                                                                                                        ; combout          ;
; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8]                                                                                                 ; |sine|sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8]                                                                                                 ; regout           ;