sine.fit.summary

原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成

Fitter Status : Successful - Tue Nov 11 23:05:34 2008
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : sine
Top-level Entity Name : sine
Family : Cyclone II
Device : EP2C35F484C8
Timing Models : Preliminary
Total logic elements : 177 / 33,216 ( < 1 % )
Total registers : 109
Total pins : 9 / 322 ( 3 % )
Total virtual pins : 0
Total memory bits : 512 / 483,840 ( < 1 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )