sine.fit.qmsg

原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成

{ "Info" "IFITAPI_FITAPI_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0 0 "Fitter is using %2!s! packing mode for logic elements with %1!s! setting for Auto Packed Registers logic option" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:01 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:02 " "Info: Fitter placement operations ending: elapsed time is 00:00:02" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "4.375 ns register register " "Info: Estimated most critical path is register to register delay of 4.375 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[4\] 1 REG LAB_X42_Y20 29 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X42_Y20; Fanout = 29; REG Node = 'sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[4\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "sine" "UNKNOWN" "V1" "D:/quartus/myproject/正弦信号发生器/db/sine.quartus_db" { Floorplan "D:/quartus/myproject/正弦信号发生器/" "" "" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4] } "NODE_NAME" } "" } } { "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 1035 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.321 ns) + CELL(0.624 ns) 1.945 ns sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~13 2 COMB LAB_X47_Y21 2 " "Info: 2: + IC(1.321 ns) + CELL(0.624 ns) = 1.945 ns; Loc. = LAB_X47_Y21; Fanout = 2; COMB Node = 'sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state~13'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "sine" "UNKNOWN" "V1" "D:/quartus/myproject/正弦信号发生器/db/sine.quartus_db" { Floorplan "D:/quartus/myproject/正弦信号发生器/" "" "1.945 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4] sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 } "NODE_NAME" } "" } } { "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 1020 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.442 ns) + CELL(0.370 ns) 2.757 ns sld_hub:sld_hub_inst\|hub_tdo~562 3 COMB LAB_X47_Y21 1 " "Info: 3: + IC(0.442 ns) + CELL(0.370 ns) = 2.757 ns; Loc. = LAB_X47_Y21; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo~562'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "sine" "UNKNOWN" "V1" "D:/quartus/myproject/正弦信号发生器/db/sine.quartus_db" { Floorplan "D:/quartus/myproject/正弦信号发生器/" "" "0.812 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 sld_hub:sld_hub_inst|hub_tdo~562 } "NODE_NAME" } "" } } { "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.161 ns) + CELL(0.651 ns) 3.569 ns sld_hub:sld_hub_inst\|hub_tdo~565 4 COMB LAB_X47_Y21 1 " "Info: 4: + IC(0.161 ns) + CELL(0.651 ns) = 3.569 ns; Loc. = LAB_X47_Y21; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo~565'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "sine" "UNKNOWN" "V1" "D:/quartus/myproject/正弦信号发生器/db/sine.quartus_db" { Floorplan "D:/quartus/myproject/正弦信号发生器/" "" "0.812 ns" { sld_hub:sld_hub_inst|hub_tdo~562 sld_hub:sld_hub_inst|hub_tdo~565 } "NODE_NAME" } "" } } { "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.161 ns) + CELL(0.537 ns) 4.267 ns sld_hub:sld_hub_inst\|hub_tdo~568 5 COMB LAB_X47_Y21 1 " "Info: 5: + IC(0.161 ns) + CELL(0.537 ns) = 4.267 ns; Loc. = LAB_X47_Y21; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|hub_tdo~568'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "sine" "UNKNOWN" "V1" "D:/quartus/myproject/正弦信号发生器/db/sine.quartus_db" { Floorplan "D:/quartus/myproject/正弦信号发生器/" "" "0.698 ns" { sld_hub:sld_hub_inst|hub_tdo~565 sld_hub:sld_hub_inst|hub_tdo~568 } "NODE_NAME" } "" } } { "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 4.375 ns sld_hub:sld_hub_inst\|hub_tdo 6 REG LAB_X47_Y21 2 " "Info: 6: + IC(0.000 ns) + CELL(0.108 ns) = 4.375 ns; Loc. = LAB_X47_Y21; Fanout = 2; REG Node = 'sld_hub:sld_hub_inst\|hub_tdo'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "sine" "UNKNOWN" "V1" "D:/quartus/myproject/正弦信号发生器/db/sine.quartus_db" { Floorplan "D:/quartus/myproject/正弦信号发生器/" "" "0.108 ns" { sld_hub:sld_hub_inst|hub_tdo~568 sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } } { "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" "" { Text "c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.290 ns ( 52.34 % ) " "Info: Total cell delay = 2.290 ns ( 52.34 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.085 ns ( 47.66 % ) " "Info: Total interconnect delay = 2.085 ns ( 47.66 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "sine" "UNKNOWN" "V1" "D:/quartus/myproject/正弦信号发生器/db/sine.quartus_db" { Floorplan "D:/quartus/myproject/正弦信号发生器/" "" "4.375 ns" { sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4] sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13 sld_hub:sld_hub_inst|hub_tdo~562 sld_hub:sld_hub_inst|hub_tdo~565 sld_hub:sld_hub_inst|hub_tdo~568 sld_hub:sld_hub_inst|hub_tdo } "NODE_NAME" } "" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 1 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 1%" {  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:28 " "Info: Fitter routing operations ending: elapsed time is 00:00:28" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}