sine.hif

原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成

-1
3
q_b2
-1
3
q_b1
-1
3
q_b0
-1
3
q_a7
-1
3
q_a6
-1
3
q_a5
-1
3
q_a4
-1
3
q_a3
-1
3
q_a2
-1
3
q_a1
-1
3
q_a0
-1
3
data_b7
-1
3
data_b6
-1
3
data_b5
-1
3
data_b4
-1
3
data_b3
-1
3
data_b2
-1
3
data_b1
-1
3
data_b0
-1
3
clock1
-1
3
clock0
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b1
-1
3
address_b0
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
SDATA.hex
3f7d9bf1b2e5d27e86c8155d21ee823f
}
# hierarchies {
rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|altsyncram_b192:altsyncram1
}
# end
# entity
sld_mod_ram_rom
# storage
db|sine.(7).cnf
db|sine.(7).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_mod_ram_rom.vhd
2392f191f04d12984b59aafb98e86e4
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
sld_node_info
135818752
PARAMETER_DEC
DEF
sld_ip_version
1
PARAMETER_DEC
DEF
sld_ip_minor_version
2
PARAMETER_DEC
DEF
sld_common_ip_version
0
PARAMETER_DEC
DEF
width_word
8
PARAMETER_UNKNOWN
USR
numwords
64
PARAMETER_UNKNOWN
USR
widthad
6
PARAMETER_UNKNOWN
USR
shift_count_bits
4
PARAMETER_UNKNOWN
USR
cvalue
00000000
PARAMETER_UNKNOWN
USR
is_data_in_ram
1
PARAMETER_UNKNOWN
USR
is_readable
1
PARAMETER_UNKNOWN
USR
node_name
1919905073
PARAMETER_UNKNOWN
USR
 constraint(address)
5 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2
}
# end
# entity
sld_rom_sr
# storage
db|sine.(8).cnf
db|sine.(8).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_rom_sr.vhd
a9933231ee3dfb326b17075bd2ca62d
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
80
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
 constraint(rom_data)
79 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr
}
# end
# entity
sine
# storage
db|sine.(0).cnf
db|sine.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
sine.vhd
f6e5316629ae81ad563e7d8e499b9eae
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# entity
sld_hub
# storage
db|sine.(9).cnf
db|sine.(9).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_hub.vhd
e490e5c6431f9617e5b32ced92b62ab
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
sld_hub_ip_version
1
PARAMETER_UNKNOWN
USR
sld_hub_ip_minor_version
2
PARAMETER_UNKNOWN
USR
sld_common_ip_version
0
PARAMETER_UNKNOWN
USR
device_family
Cyclone II
PARAMETER_UNKNOWN
USR
n_nodes
1
PARAMETER_UNKNOWN
USR
n_sel_bits
1
PARAMETER_UNKNOWN
USR
n_node_ir_bits
5
PARAMETER_UNKNOWN
USR
node_info
00001000000110000110111000000000
PARAMETER_BIN
USR
}
# end
# entity
sld_jtag_state_machine
# storage
db|sine.(10).cnf
db|sine.(10).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_hub.vhd
e490e5c6431f9617e5b32ced92b62ab
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
1
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
 constraint(jtag_state)
15 downto 0
PARAMETER_STRING
USR
}
# end
# entity
lpm_shiftreg
# storage
db|sine.(11).cnf
db|sine.(11).cnf
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|lpm_shiftreg.tdf
785a3897e231f6ebb4e0644e3aab46e4
6
# user_parameter {
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
shiftin
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
enable
-1
3
clock
-1
3
aclr
-1
3
}
# include_file {
c:|altera|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
c:|altera|quartus51|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
c:|altera|quartus51|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
}
# end
# entity
lpm_decode
# storage
db|sine.(12).cnf
db|sine.(12).cnf
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|lpm_decode.tdf
c3fcd551257a5bc05a7ffda9d2936c3f
6
# user_parameter {
LPM_WIDTH
3
PARAMETER_DEC
USR
LPM_DECODES
8
PARAMETER_DEC
USR
LPM_PIPELINE
1
PARAMETER_DEC
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
decode_rpe
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
eq7
-1
3
eq3
-1
3
eq2
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# include_file {
c:|altera|quartus51|libraries|megafunctions|aglobal51.inc
79bc6dd52df42999c126c3949d5fedc
c:|altera|quartus51|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
c:|altera|quartus51|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
c:|altera|quartus51|libraries|megafunctions|declut.inc
b1d5939399e5c04dfe1d209af8cc490
c:|altera|quartus51|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
}
# end
# entity
decode_rpe
# storage
db|sine.(13).cnf
db|sine.(13).cnf
# case_insensitive
# source_file
db|decode_rpe.tdf
7d1355a861a650d6a6866ec2904af761
6
# used_port {
eq7
-1
3
eq6
-1
3
eq5
-1
3
eq4
-1
3
eq3
-1
3
eq2
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# end
# entity
sld_dffex
# storage
db|sine.(14).cnf
db|sine.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_dffex.vhd
9b4e2ef519b7864e3dc841f8bb741
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
1
PARAMETER_DEC
USR
 constraint(d)
0 downto 0
PARAMETER_STRING
USR
 constraint(q)
0 downto 0
PARAMETER_STRING
USR
}
# end
# entity
sld_dffex
# storage
db|sine.(15).cnf
db|sine.(15).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_dffex.vhd
9b4e2ef519b7864e3dc841f8bb741
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
6
PARAMETER_DEC
USR
 constraint(d)
5 downto 0
PARAMETER_STRING
USR
 constraint(q)
5 downto 0
PARAMETER_STRING
USR
}
# end
# entity
sld_dffex
# storage
db|sine.(16).cnf
db|sine.(16).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_dffex.vhd
9b4e2ef519b7864e3dc841f8bb741
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
5
PARAMETER_DEC
USR
 constraint(d)
4 downto 0
PARAMETER_STRING
USR
 constraint(q)
4 downto 0
PARAMETER_STRING
USR
}
# end
# entity
sld_rom_sr
# storage
db|sine.(17).cnf
db|sine.(17).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus51|libraries|megafunctions|sld_rom_sr.vhd
a9933231ee3dfb326b17075bd2ca62d
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
64
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
 constraint(rom_data)
63 downto 0
PARAMETER_STRING
USR
}
# end
# complete