sine.map.eqn

原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成

--B1L26 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~64
B1L26 = AMPP_FUNCTION(D7_Q[0], J1_dffe1a[2]);


--B1L27 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~65
B1L27 = AMPP_FUNCTION(B1L6, B1L26, D6_Q[0], D2_Q[0]);


--B1_jtag_debug_mode_usr0 is sld_hub:sld_hub_inst|jtag_debug_mode_usr0
B1_jtag_debug_mode_usr0 = AMPP_FUNCTION(A1L5, A1L44, H1_state[0], H1_state[12]);


--B1L36 is sld_hub:sld_hub_inst|jtag_debug_mode~2
B1L36 = AMPP_FUNCTION(B1_jtag_debug_mode_usr1, B1_jtag_debug_mode_usr0);


--H1_state[12] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[12]
H1_state[12] = AMPP_FUNCTION(A1L5, H1L31);


--H1_state[2] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[2]
H1_state[2] = AMPP_FUNCTION(A1L5, H1L32);


--B1L37 is sld_hub:sld_hub_inst|jtag_debug_mode~171
B1L37 = AMPP_FUNCTION(H1_state[12], A1L7, H1_state[2]);


--H1_state[15] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[15]
H1_state[15] = AMPP_FUNCTION(A1L5, H1L30, !A1L7);


--B1L38 is sld_hub:sld_hub_inst|jtag_debug_mode~172
B1L38 = AMPP_FUNCTION(B1L36, B1_jtag_debug_mode, B1L37, H1_state[15]);


--H1_state[0] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0]
H1_state[0] = AMPP_FUNCTION(A1L5, H1L34);


--B1L24 is sld_hub:sld_hub_inst|IRF_ENA_ENABLE~21
B1L24 = AMPP_FUNCTION(A1L7, B1_jtag_debug_mode_usr1, H1_state[4], B1_OK_TO_UPDATE_IR_Q);


--G1_dffs[1] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[1]
G1_dffs[1] = AMPP_FUNCTION(A1L5, G1_dffs[2], H1_state[0], H1_state[11]);


--G1_dffs[9] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[9]
G1_dffs[9] = AMPP_FUNCTION(A1L5, altera_internal_jtag, H1_state[0], H1_state[11]);


--G1_dffs[8] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[8]
G1_dffs[8] = AMPP_FUNCTION(A1L5, G1_dffs[9], H1_state[0], H1_state[11]);


--G1_dffs[7] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[7]
G1_dffs[7] = AMPP_FUNCTION(A1L5, G1_dffs[8], H1_state[0], H1_state[11]);


--G1_dffs[6] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[6]
G1_dffs[6] = AMPP_FUNCTION(A1L5, G1_dffs[7], H1_state[0], H1_state[11]);


--A1L45 is rtl~76
A1L45 = !G1_dffs[9] & !G1_dffs[8] & !G1_dffs[7] & !G1_dffs[6];


--G1_dffs[3] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[3]
G1_dffs[3] = AMPP_FUNCTION(A1L5, G1_dffs[4], H1_state[0], H1_state[11]);


--G1_dffs[2] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[2]
G1_dffs[2] = AMPP_FUNCTION(A1L5, G1_dffs[3], H1_state[0], H1_state[11]);


--G1_dffs[5] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[5]
G1_dffs[5] = AMPP_FUNCTION(A1L5, G1_dffs[6], H1_state[0], H1_state[11]);


--G1_dffs[4] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[4]
G1_dffs[4] = AMPP_FUNCTION(A1L5, G1_dffs[5], H1_state[0], H1_state[11]);


--A1L46 is rtl~77
A1L46 = G1_dffs[3] & G1_dffs[2] & !G1_dffs[5] & !G1_dffs[4];


--G1_dffs[0] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[0]
G1_dffs[0] = AMPP_FUNCTION(A1L5, G1_dffs[1], H1_state[0], H1_state[11]);


--A1L43 is rtl~0
A1L43 = G1_dffs[1] & A1L45 & A1L46 & !G1_dffs[0];


--J1_dffe1a[1] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[1]
J1_dffe1a[1] = AMPP_FUNCTION(A1L5, J1_w_anode18w[3], B1_CLRN_SIGNAL, B1L4);


--D2L3 is sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]~52
D2L3 = AMPP_FUNCTION(D7_Q[0], J1_dffe1a[1]);


--H1_state[8] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8]
H1_state[8] = AMPP_FUNCTION(A1L5, H1L25, !A1L7);


--D1L3 is sld_hub:sld_hub_inst|sld_dffex:RESET|Q[0]~59
D1L3 = AMPP_FUNCTION(B1_OK_TO_UPDATE_IR_Q, H1_state[8]);


--D2L4 is sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]~53
D2L4 = AMPP_FUNCTION(D2L3, D2_Q[0], D1L3, B1L26);


--A1L26 is q1[0]~48
A1L26 = q1[0] $ VCC;

--A1L27 is q1[0]~49
A1L27 = CARRY(q1[0]);


--A1L29 is q1[1]~50
A1L29 = q1[1] & !A1L27 # !q1[1] & (A1L27 # GND);

--A1L30 is q1[1]~51
A1L30 = CARRY(!A1L27 # !q1[1]);


--A1L32 is q1[2]~52
A1L32 = q1[2] & (A1L30 $ GND) # !q1[2] & !A1L30 & VCC;

--A1L33 is q1[2]~53
A1L33 = CARRY(q1[2] & !A1L30);


--A1L35 is q1[3]~54
A1L35 = q1[3] & !A1L33 # !q1[3] & (A1L33 # GND);

--A1L36 is q1[3]~55
A1L36 = CARRY(!A1L33 # !q1[3]);


--A1L38 is q1[4]~56
A1L38 = q1[4] & (A1L36 $ GND) # !q1[4] & !A1L36 & VCC;

--A1L39 is q1[4]~57
A1L39 = CARRY(q1[4] & !A1L36);


--A1L41 is q1[5]~58
A1L41 = q1[5] $ A1L39;


--D4_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3]
D4_Q[3] = AMPP_FUNCTION(A1L5, B1L22, B1_CLRN_SIGNAL, B1L27);


--D4_Q[1] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1]
D4_Q[1] = AMPP_FUNCTION(A1L5, B1L20, B1_CLRN_SIGNAL, B1L27);


--N1_ram_rom_data_shift_cntr_reg[1] is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1]
N1_ram_rom_data_shift_cntr_reg[1] = AMPP_FUNCTION(A1L5, N1L59, !D4_Q[3], N1L70);


--N1_ram_rom_data_shift_cntr_reg[0] is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]
N1_ram_rom_data_shift_cntr_reg[0] = AMPP_FUNCTION(A1L5, N1L56, !D4_Q[3], N1L70);


--N1_ram_rom_data_shift_cntr_reg[2] is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]
N1_ram_rom_data_shift_cntr_reg[2] = AMPP_FUNCTION(A1L5, N1L62, !D4_Q[3], N1L70);


--N1_ram_rom_data_shift_cntr_reg[3] is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[3]
N1_ram_rom_data_shift_cntr_reg[3] = AMPP_FUNCTION(A1L5, N1L65, !D4_Q[3], N1L70);


--N1L70 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|rtl~0
N1L70 = AMPP_FUNCTION(N1_ram_rom_data_shift_cntr_reg[1], N1_ram_rom_data_shift_cntr_reg[0], N1_ram_rom_data_shift_cntr_reg[2], N1_ram_rom_data_shift_cntr_reg[3]);


--N1L13 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~1
N1L13 = AMPP_FUNCTION(D4_Q[3], D4_Q[1], N1L70);


--N1L46 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg~652
N1L46 = AMPP_FUNCTION(M1_q_b[0], N1_ram_rom_data_reg[1], N1L13);


--D4L4 is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1]~61
D4L4 = AMPP_FUNCTION(D4_Q[2], D4_Q[1]);


--N1L45 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]~653
N1L45 = AMPP_FUNCTION(D4L4, N1L11, H1_state[4], N1L13);


--N1L68 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~19
N1L68 = AMPP_FUNCTION(D4_Q[2], N1L11);


--N1L69 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~20
N1L69 = AMPP_FUNCTION(D4_Q[1], N1_ram_rom_data_shift_cntr_reg[0], N1_ram_rom_data_shift_cntr_reg[2], N1_ram_rom_data_shift_cntr_reg[3]);


--N1_ram_rom_incr_addr is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr
N1_ram_rom_incr_addr = AMPP_FUNCTION(N1L68, H1_state[8], N1L69, N1_ram_rom_data_shift_cntr_reg[1]);


--N1L19 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]~96
N1L19 = AMPP_FUNCTION(N1_ram_rom_incr_addr, N1_ram_rom_addr_reg[0], GND);

--N1L20 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]~97
N1L20 = AMPP_FUNCTION(N1_ram_rom_incr_addr, N1_ram_rom_addr_reg[0]);


--D4_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0]
D4_Q[0] = AMPP_FUNCTION(A1L5, B1L19, B1_CLRN_SIGNAL, B1L27);


--N1L12 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|process0~11
N1L12 = AMPP_FUNCTION(N1L11, H1_state[4], D4_Q[3]);


--N1L22 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]~98
N1L22 = AMPP_FUNCTION(N1_ram_rom_addr_reg[1], GND, N1L20);

--N1L23 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]~99
N1L23 = AMPP_FUNCTION(N1_ram_rom_addr_reg[1], N1L20);


--N1L25 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]~100
N1L25 = AMPP_FUNCTION(N1_ram_rom_addr_reg[2], GND, N1L23);

--N1L26 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[2]~101
N1L26 = AMPP_FUNCTION(N1_ram_rom_addr_reg[2], N1L23);


--N1L28 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]~102
N1L28 = AMPP_FUNCTION(N1_ram_rom_addr_reg[3], GND, N1L26);

--N1L29 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[3]~103
N1L29 = AMPP_FUNCTION(N1_ram_rom_addr_reg[3], N1L26);


--N1L31 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]~104
N1L31 = AMPP_FUNCTION(N1_ram_rom_addr_reg[4], GND, N1L29);

--N1L32 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[4]~105
N1L32 = AMPP_FUNCTION(N1_ram_rom_addr_reg[4], N1L29);


--N1L34 is rom1:u1|altsyncram:altsyncram_component|altsyncram_4d51:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[5]~106
N1L34 = AMPP_FUNCTION(N1_ram_rom_addr_reg[5], N1L32);