sine.fit.talkback.xml

原创：采用VHDL语言编写的正弦信号发生器。rom采用quartus自带的lpm生成

		<i_o_bank>7</i_o_bank>
		<usage>0 / 36 ( 0 % )</usage>
		<vccio_voltage>3.3V</vccio_voltage>
	</row>
	<row>
		<i_o_bank>8</i_o_bank>
		<usage>0 / 39 ( 0 % )</usage>
		<vccio_voltage>3.3V</vccio_voltage>
	</row>
</i_o_bank_usage>
<advanced_data___general>
	<row>
		<name>Status Code</name>
		<value>0</value>
	</row>
	<row>
		<name>Desired User Slack</name>
		<value>0</value>
	</row>
	<row>
		<name>Fit Attempts</name>
		<value>1</value>
	</row>
</advanced_data___general>
<advanced_data___placement_preparation>
	<row>
		<name>Auto Fit Point 1 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Mid Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Mid Slack - Fit Attempt 1</name>
		<value>493145</value>
	</row>
	<row>
		<name>Internal Atom Count - Fit Attempt 1</name>
		<value>270</value>
	</row>
	<row>
		<name>LE/ALM Count - Fit Attempt 1</name>
		<value>178</value>
	</row>
	<row>
		<name>LAB Count - Fit Attempt 1</name>
		<value>21</value>
	</row>
	<row>
		<name>Outputs per Lab - Fit Attempt 1</name>
		<value>5.619</value>
	</row>
	<row>
		<name>Inputs per LAB - Fit Attempt 1</name>
		<value>8.714</value>
	</row>
	<row>
		<name>Global Inputs per LAB - Fit Attempt 1</name>
		<value>1.476</value>
	</row>
	<row>
		<name>LAB Constraint &apos;non-global clock + sync load&apos; - Fit Attempt 1</name>
		<value>0:20;1:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;non-global controls&apos; - Fit Attempt 1</name>
		<value>0:6;1:4;2:10;3:1</value>
	</row>
	<row>
		<name>LAB Constraint &apos;non-global + aclr&apos; - Fit Attempt 1</name>
		<value>0:5;1:3;2:4;3:7;4:2</value>
	</row>
	<row>
		<name>LAB Constraint &apos;global non-clock non-aclr&apos; - Fit Attempt 1</name>
		<value>0:21</value>
	</row>
	<row>
		<name>LAB Constraint &apos;global controls&apos; - Fit Attempt 1</name>
		<value>0:3;1:7;2:8;3:3</value>
	</row>
	<row>
		<name>LAB Constraint &apos;deterministic LABSMUXA/LABXMUXB&apos; - Fit Attempt 1</name>
		<value>0:9;1:10;2:2</value>
	</row>
	<row>
		<name>LAB Constraint &apos;deterministic LABSMUXC/LABXMUXD&apos; - Fit Attempt 1</name>
		<value>0:6;1:10;2:5</value>
	</row>
	<row>
		<name>LAB Constraint &apos;clock / ce pair constraint&apos; - Fit Attempt 1</name>
		<value>0:3;1:7;2:11</value>
	</row>
	<row>
		<name>LAB Constraint &apos;aclr constraint&apos; - Fit Attempt 1</name>
		<value>0:3;1:11;2:7</value>
	</row>
	<row>
		<name>LAB Constraint &apos;true sload_sclear pair&apos; - Fit Attempt 1</name>
		<value>0:11;1:10</value>
	</row>
	<row>
		<name>LAB Constraint &apos;constant sload_sclear pair&apos; - Fit Attempt 1</name>
		<value>0:14;1:7</value>
	</row>
	<row>
		<name>LAB Constraint &apos;has placement constraint&apos; - Fit Attempt 1</name>
		<value>0:21</value>
	</row>
	<row>
		<name>LEs in Chains - Fit Attempt 1</name>
		<value>26</value>
	</row>
	<row>
		<name>LEs in Long Chains - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>LABs with Chains - Fit Attempt 1</name>
		<value>5</value>
	</row>
	<row>
		<name>LABs with Multiple Chains - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time - Fit Attempt 1</name>
		<value>1</value>
	</row>
	<row>
		<name>Time in tsm_dat.dll - Fit Attempt 1</name>
		<value>0.020</value>
	</row>
	<row>
		<name>Time in tsm_tan.dll - Fit Attempt 1</name>
		<value>0.200</value>
	</row>
</advanced_data___placement_preparation>
<advanced_data___placement>
	<row>
		<name>Auto Fit Point 2 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Early Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Early Slack - Fit Attempt 1</name>
		<value>495348</value>
	</row>
	<row>
		<name>Auto Fit Point 3 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Mid Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Mid Slack - Fit Attempt 1</name>
		<value>495361</value>
	</row>
	<row>
		<name>Auto Fit Point 4 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Late Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Late Slack - Fit Attempt 1</name>
		<value>495361</value>
	</row>
	<row>
		<name>Auto Fit Point 5 - Fit Attempt 1</name>
		<value>ff</value>
	</row>
	<row>
		<name>Time - Fit Attempt 1</name>
		<value>2</value>
	</row>
	<row>
		<name>Time in tsm_dat.dll - Fit Attempt 1</name>
		<value>0.020</value>
	</row>
	<row>
		<name>Time in tsm_tan.dll - Fit Attempt 1</name>
		<value>0.600</value>
	</row>
</advanced_data___placement>
<advanced_data___routing>
	<row>
		<name>Early Slack - Fit Attempt 1</name>
		<value>496085</value>
	</row>
	<row>
		<name>Early Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Peak Regional Wire - Fit Attempt 1</name>
		<value>2</value>
	</row>
	<row>
		<name>Mid Slack - Fit Attempt 1</name>
		<value>493950</value>
	</row>
	<row>
		<name>Late Slack - Fit Attempt 1</name>
		<value>493950</value>
	</row>
	<row>
		<name>Late Slack - Fit Attempt 1</name>
		<value>493950</value>
	</row>
	<row>
		<name>Late Wire Use - Fit Attempt 1</name>
		<value>0</value>
	</row>
	<row>
		<name>Time - Fit Attempt 1</name>
		<value>28</value>
	</row>
	<row>
		<name>Time in tsm_dat.dll - Fit Attempt 1</name>
		<value>0.010</value>
	</row>
	<row>
		<name>Time in tsm_tan.dll - Fit Attempt 1</name>
		<value>0.781</value>
	</row>
</advanced_data___routing>
<compilation_summary>
	<flow_status>Successful - Tue Nov 11 23:05:34 2008</flow_status>
	<quartus_ii_version>5.1 Build 176 10/26/2005 SJ Full Version</quartus_ii_version>
	<revision_name>sine</revision_name>
	<top_level_entity_name>sine</top_level_entity_name>
	<family>Cyclone II</family>
	<device>EP2C35F484C8</device>
	<timing_models>Preliminary</timing_models>
	<met_timing_requirements>N/A</met_timing_requirements>
	<total_logic_elements>177 / 33,216 ( &lt; 1 % )</total_logic_elements>
	<total_registers>109</total_registers>
	<total_pins>9 / 322 ( 3 % )</total_pins>
	<total_virtual_pins>0</total_virtual_pins>
	<total_memory_bits>512 / 483,840 ( &lt; 1 % )</total_memory_bits>
	<embedded_multiplier_9_bit_elements>0 / 70 ( 0 % )</embedded_multiplier_9_bit_elements>
	<total_plls>0 / 4 ( 0 % )</total_plls>
</compilation_summary>
<compile_id>5435D224</compile_id>
<files>
	<top>D:/quartus/myproject/正弦信号发生器/sine.vhd</top>
	<extensions>
		<ext ext_name="cmp">1</ext>
		<ext ext_name="vhd">6</ext>
		<ext ext_name="vwf">1</ext>
		<ext ext_name="tdf">6</ext>
		<ext ext_name="inc">15</ext>
		<ext ext_name="lst">1</ext>
		<ext ext_name="hex">1</ext>
	</extensions>
	<sub_files>
		<sub_file>D:/quartus/myproject/正弦信号发生器/rom1.cmp</sub_file>
		<sub_file>D:/quartus/myproject/正弦信号发生器/rom1.vhd</sub_file>
		<sub_file>D:/quartus/myproject/正弦信号发生器/sine.vhd</sub_file>
		<sub_file>D:/quartus/myproject/正弦信号发生器/rom1.vwf</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/altsyncram.tdf</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/stratix_ram_block.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/lpm_mux.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/lpm_decode.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/aglobal51.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/altsyncram.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/a_rdenreg.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/altrom.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/altram.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/altdpram.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/altqpram.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/cbx.lst</sub_file>
		<sub_file>D:/quartus/myproject/正弦信号发生器/db/altsyncram_4d51.tdf</sub_file>
		<sub_file>D:/quartus/myproject/正弦信号发生器/db/altsyncram_b192.tdf</sub_file>
		<sub_file>D:/quartus/myproject/正弦信号发生器/SDATA.hex</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/sld_mod_ram_rom.vhd</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/sld_rom_sr.vhd</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/sld_hub.vhd</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/lpm_shiftreg.tdf</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/lpm_constant.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/dffeea.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/lpm_decode.tdf</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/declut.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/altshift.inc</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/lpm_compare.inc</sub_file>
		<sub_file>D:/quartus/myproject/正弦信号发生器/db/decode_rpe.tdf</sub_file>
		<sub_file>c:/altera/quartus51/libraries/megafunctions/sld_dffex.vhd</sub_file>
	</sub_files>
</files>
<architecture>
	<family>Cyclone II</family>
	<auto_device>OFF</auto_device>
	<device>EP2C35F484C8</device>
</architecture>
<pkg_io>
	<pin_std count="16">LVTTL</pin_std>
</pkg_io>
</talkback>