mul.map.eqn

VHDL乘法器 四输入 四输出的代码设计

--A1L41 is add~10
--operation mode is normal

A1L41_carry_eqn = A1L31;
A1L41 = !A1L41_carry_eqn;


--A1L33 is add~36
--operation mode is normal

A1L33 = A1L41 & b[3];


--A1L21 is add~9
--operation mode is arithmetic

A1L21_carry_eqn = A1L11;
A1L21 = A1L43 $ a[3] $ A1L21_carry_eqn;

--A1L31 is add~9COUT
--operation mode is arithmetic

A1L31 = CARRY(A1L43 & !a[3] & !A1L11 # !A1L43 & (!A1L11 # !a[3]));


--A1L32 is add~15
--operation mode is normal

A1L32_carry_eqn = A1L22;
A1L32 = !A1L32_carry_eqn;


--A1L73 is add~297
--operation mode is normal

A1L73 = b[3] & A1L21 # !b[3] & A1L32 & b[2];


--A1L01 is add~8
--operation mode is arithmetic

A1L01_carry_eqn = A1L9;
A1L01 = A1L83 $ a[2] $ !A1L01_carry_eqn;

--A1L11 is add~8COUT
--operation mode is arithmetic

A1L11 = CARRY(A1L83 & (a[2] # !A1L9) # !A1L83 & a[2] & !A1L9);


--A1L12 is add~14
--operation mode is arithmetic

A1L12_carry_eqn = A1L02;
A1L12 = A1L53 $ a[3] $ A1L12_carry_eqn;

--A1L22 is add~14COUT
--operation mode is arithmetic

A1L22 = CARRY(A1L53 & !a[3] & !A1L02 # !A1L53 & (!A1L02 # !a[3]));


--A1L23 is add~20
--operation mode is normal

A1L23_carry_eqn = A1L13;
A1L23 = !A1L23_carry_eqn;


--A1L83 is add~298
--operation mode is normal

A1L83 = b[2] & A1L12 # !b[2] & A1L23 & b[1];


--A1L93 is add~299
--operation mode is normal

A1L93 = A1L01 & (A1L83 # b[3]) # !A1L01 & A1L83 & !b[3];


--A1L8 is add~7
--operation mode is arithmetic

A1L8_carry_eqn = A1L7;
A1L8 = A1L04 $ a[1] $ A1L8_carry_eqn;

--A1L9 is add~7COUT
--operation mode is arithmetic

A1L9 = CARRY(A1L04 & !a[1] & !A1L7 # !A1L04 & (!A1L7 # !a[1]));


--A1L91 is add~13
--operation mode is arithmetic

A1L91_carry_eqn = A1L81;
A1L91 = A1L63 $ a[2] $ !A1L91_carry_eqn;

--A1L02 is add~13COUT
--operation mode is arithmetic

A1L02 = CARRY(A1L63 & (a[2] # !A1L81) # !A1L63 & a[2] & !A1L81);


--A1L03 is add~19
--operation mode is arithmetic

A1L03_carry_eqn = A1L92;
A1L03 = a[3] $ A1L03_carry_eqn;

--A1L13 is add~19COUT
--operation mode is arithmetic

A1L13 = CARRY(!A1L92 # !a[3]);


--A1L04 is add~300
--operation mode is normal

A1L04 = b[2] & A1L91 # !b[2] & A1L03 & b[1];


--A1L14 is add~301
--operation mode is normal

A1L14 = A1L8 & (A1L04 # b[3]) # !A1L8 & A1L04 & !b[3];


--A1L6 is add~6
--operation mode is arithmetic

A1L6 = A1L34 $ a[0];

--A1L7 is add~6COUT
--operation mode is arithmetic

A1L7 = CARRY(A1L34 & a[0]);


--A1L71 is add~12
--operation mode is arithmetic

A1L71_carry_eqn = A1L61;
A1L71 = A1L24 $ a[1] $ A1L71_carry_eqn;

--A1L81 is add~12COUT
--operation mode is arithmetic

A1L81 = CARRY(A1L24 & !a[1] & !A1L61 # !A1L24 & (!A1L61 # !a[1]));


--A1L82 is add~18
--operation mode is arithmetic

A1L82_carry_eqn = A1L72;
A1L82 = A1L35 $ a[2] $ !A1L82_carry_eqn;

--A1L92 is add~18COUT
--operation mode is arithmetic

A1L92 = CARRY(A1L35 & (a[2] # !A1L72) # !A1L35 & a[2] & !A1L72);


--A1L24 is add~302
--operation mode is normal

A1L24 = b[1] & A1L82 # !b[1] & b[0] & a[3];


--A1L34 is add~303
--operation mode is normal

A1L34 = A1L71 & (A1L24 # b[2]) # !A1L71 & A1L24 & !b[2];


--A1L44 is add~304
--operation mode is normal

A1L44 = A1L6 & (A1L34 # b[3]) # !A1L6 & A1L34 & !b[3];


--A1L51 is add~11
--operation mode is arithmetic

A1L51 = A1L54 $ a[0];

--A1L61 is add~11COUT
--operation mode is arithmetic

A1L61 = CARRY(A1L54 & a[0]);


--A1L62 is add~17
--operation mode is arithmetic

A1L62_carry_eqn = A1L52;
A1L62 = A1L45 $ a[1] $ A1L62_carry_eqn;

--A1L72 is add~17COUT
--operation mode is arithmetic

A1L72 = CARRY(A1L45 & !a[1] & !A1L52 # !A1L45 & (!A1L52 # !a[1]));


--A1L54 is add~305
--operation mode is normal

A1L54 = b[1] & A1L62 # !b[1] & b[0] & a[2];


--A1L64 is add~306
--operation mode is normal

A1L64 = A1L51 & (A1L54 # b[2]) # !A1L51 & A1L54 & !b[2];


--A1L42 is add~16
--operation mode is arithmetic

A1L42 = A1L55 $ a[0];

--A1L52 is add~16COUT
--operation mode is arithmetic

A1L52 = CARRY(A1L55 & a[0]);


--A1L74 is add~307
--operation mode is normal

A1L74 = b[1] & A1L42 # !b[1] & b[0] & a[1];


--A1L65 is prod~70
--operation mode is normal

A1L65 = b[0] & a[0];


--A1L43 is add~37
--operation mode is normal

A1L43 = A1L32 & b[2];


--A1L53 is add~38
--operation mode is normal

A1L53 = A1L23 & b[1];


--A1L63 is add~39
--operation mode is normal

A1L63 = A1L03 & b[1];


--A1L35 is prod~67
--operation mode is normal

A1L35 = b[0] & a[3];


--A1L45 is prod~68
--operation mode is normal

A1L45 = b[0] & a[2];


--A1L55 is prod~69
--operation mode is normal

A1L55 = b[0] & a[1];


--b[3] is b[3]
--operation mode is input

b[3] = INPUT();


--b[2] is b[2]
--operation mode is input

b[2] = INPUT();


--b[1] is b[1]
--operation mode is input

b[1] = INPUT();


--b[0] is b[0]
--operation mode is input

b[0] = INPUT();


--a[3] is a[3]
--operation mode is input

a[3] = INPUT();


--a[2] is a[2]
--operation mode is input

a[2] = INPUT();


--a[1] is a[1]
--operation mode is input

a[1] = INPUT();


--a[0] is a[0]
--operation mode is input

a[0] = INPUT();


--y[7] is y[7]
--operation mode is output

y[7] = OUTPUT(A1L33);


--y[6] is y[6]
--operation mode is output

y[6] = OUTPUT(A1L73);


--y[5] is y[5]
--operation mode is output

y[5] = OUTPUT(A1L93);


--y[4] is y[4]
--operation mode is output

y[4] = OUTPUT(A1L14);


--y[3] is y[3]
--operation mode is output

y[3] = OUTPUT(A1L44);


--y[2] is y[2]
--operation mode is output

y[2] = OUTPUT(A1L64);


--y[1] is y[1]
--operation mode is output

y[1] = OUTPUT(A1L74);


--y[0] is y[0]
--operation mode is output

y[0] = OUTPUT(A1L65);