digital_clk.fit.eqn

该工程的主要功能是由VHDL语言实现多功能数字电子时钟

--operation mode is normal

A1L711 = A1L24 & (A1L83 # A1L43);


--A1L501 is i~686 at LC1_B4
--operation mode is normal

A1L501 = A1L611 # A1L711 & A1L501;


--A1L911 is i~8217 at LC8_B4
--operation mode is normal

A1L911 = A1L92 & !A1L43 & (A1L24 $ A1L83) # !A1L92 & (A1L83 & !A1L24 # !A1L83 & !A1L43);


--A1L601 is i~687 at LC2_B4
--operation mode is normal

A1L601 = A1L911 # A1L24 & A1L601;


--A1L121 is i~8220 at LC1_B2
--operation mode is normal

A1L121 = !cnt[0] & (cnt[1] $ cnt[2]);


--A1L701 is i~712 at LC6_B4
--operation mode is normal

A1L701 = A1L711 & A1L701 # !A1L711 & A1L121;


--clk1khz is clk1khz at LC5_B2
--operation mode is normal

clk1khz_lut_out = !clk1khz;
clk1khz = DFFEA(clk1khz_lut_out, GLOBAL(clk), , , A1L41, , );


--A1L26 is i292~49 at LC1_A13
--operation mode is normal

A1L26 = min[0] & E5_q[0] & (min[3] $ !E5_q[3]) # !min[0] & !E5_q[0] & (min[3] $ !E5_q[3]);


--A1L36 is i292~50 at LC5_A13
--operation mode is normal

A1L36 = min[1] & E5_q[1] & (min[2] $ !E5_q[2]) # !min[1] & !E5_q[1] & (min[2] $ !E5_q[2]);


--A1L46 is i292~51 at LC7_A13
--operation mode is normal

A1L46 = min[5] & E5_q[5] & (min[4] $ !E5_q[4]) # !min[5] & !E5_q[5] & (min[4] $ !E5_q[4]);


--A1L56 is i292~52 at LC4_A13
--operation mode is normal

A1L56 = !clken & A1L46 & A1L36 & A1L26;


--A1L95 is i288~29 at LC8_A15
--operation mode is normal

A1L95 = hour[0] & E2_q[0] & (hour[2] $ !E2_q[2]) # !hour[0] & !E2_q[0] & (hour[2] $ !E2_q[2]);


--A1L06 is i288~30 at LC1_A20
--operation mode is normal

A1L06 = hour[4] & E2_q[4] & (hour[3] $ !E2_q[3]) # !hour[4] & !E2_q[4] & (hour[3] $ !E2_q[3]);


--A1L16 is i288~31 at LC2_A20
--operation mode is normal

A1L16 = A1L06 & A1L95 & (hour[1] $ !E2_q[1]);


--A1L321 is i~8222 at LC6_B15
--operation mode is normal

A1L321 = !E4_q[8] # !E4_q[7] # !E4_q[6] # !E4_q[5];


--A1L421 is i~8223 at LC2_B13
--operation mode is normal

A1L421 = E4_q[2] # E4_q[3] # !E4_q[4] # !E4_q[1];


--A1L521 is i~8224 at LC3_B13
--operation mode is normal

A1L521 = A1L421 # A1L321 # !E4_q[0];


--state[2] is state[2] at LC3_A9
--operation mode is normal

state[2]_lut_out = state[1] & !state[2] & state[0] # !state[1] & state[2];
state[2] = DFFEA(state[2]_lut_out, GLOBAL(mode), !clr, , , , );


--state[0] is state[0] at LC5_A9
--operation mode is normal

state[0]_lut_out = !state[0] & (!state[2] # !state[1]);
state[0] = DFFEA(state[0]_lut_out, GLOBAL(mode), !clr, , , , );


--state[1] is state[1] at LC2_A9
--operation mode is normal

state[1]_lut_out = state[1] & !state[2] & !state[0] # !state[1] & state[0];
state[1] = DFFEA(state[1]_lut_out, GLOBAL(mode), !clr, , , , );


--A1L02 is clock~1 at LC3_A20
--operation mode is normal

A1L02 = A1L91 & !state[1] & !state[0] & !state[2];


--clk2hz is clk2hz at LC4_B5
--operation mode is normal

clk2hz_lut_out = !clk2hz;
clk2hz = DFFEA(clk2hz_lut_out, clk1khz, , , A1L371, , );


--A1L5 is blink[1]~327 at LC2_B5
--operation mode is normal

A1L5 = !state[0] & clk2hz;


--A1L4 is blink[1]~30 at LC8_B5
--operation mode is normal

A1L4 = state[1] & (state[2] & A1L4 # !state[2] & A1L5) # !state[1] & state[2] & A1L5;


--A1L2 is blink[0]~329 at LC5_A5
--operation mode is normal

A1L2 = state[2] & A1L1 # !state[2] & clk2hz & state[0];


--A1L1 is blink[0]~31 at LC8_A5
--operation mode is normal

A1L1 = A1L2 & state[1];


--sec[1] is sec[1] at LC4_A21
--operation mode is normal

sec[1]_lut_out = A1L141;
sec[1] = DFFEA(sec[1]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--sec[2] is sec[2] at LC2_A22
--operation mode is normal

sec[2]_lut_out = A1L341;
sec[2] = DFFEA(sec[2]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--sec[3] is sec[3] at LC5_A22
--operation mode is normal

sec[3]_lut_out = A1L441 # A1L631 & sec[3];
sec[3] = DFFEA(sec[3]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--sec[4] is sec[4] at LC7_A22
--operation mode is normal

sec[4]_lut_out = A1L541;
sec[4] = DFFEA(sec[4]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--sec[5] is sec[5] at LC1_A23
--operation mode is normal

sec[5]_lut_out = A1L641 # A1L631 & sec[5];
sec[5] = DFFEA(sec[5]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--sec[0] is sec[0] at LC6_A21
--operation mode is normal

sec[0]_lut_out = A1L731 & A1L741 # !A1L731 & sec[0];
sec[0] = DFFEA(sec[0]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--A1L8 is blink[2]~331 at LC3_B5
--operation mode is normal

A1L8 = state[1] & state[2] & A1L7;


--A1L7 is blink[2]~32 at LC5_B5
--operation mode is normal

A1L7 = A1L8 # !state[1] & clk2hz & state[0];


--hour_display[1] is hour_display[1] at LC2_B8
--operation mode is normal

hour_display[1]_lut_out = state[2] & A1L841 # !state[2] & hour[1];
hour_display[1] = DFFEA(hour_display[1]_lut_out, GLOBAL(clk1hz), , , A1L581, hour[1], clr);


--K71L5 is lpm_divide:i_rtl_5|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00011|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~39 at LC1_B3
--operation mode is normal

K71L5 = K71L4 # G1L2 # G1L1;


--hour_display[2] is hour_display[2] at LC2_B10
--operation mode is normal

hour_display[2]_lut_out = state[2] & A1L941 # !state[2] & hour[2];
hour_display[2] = DFFEA(hour_display[2]_lut_out, GLOBAL(clk1hz), , , A1L581, hour[2], clr);


--hour_display[3] is hour_display[3] at LC8_A20
--operation mode is normal

hour_display[3]_lut_out = state[2] & A1L051 # !state[2] & hour[3];
hour_display[3] = DFFEA(hour_display[3]_lut_out, GLOBAL(clk1hz), , , A1L581, hour[3], clr);


--hour_display[0] is hour_display[0] at LC6_A9
--operation mode is normal

hour_display[0]_lut_out = state[2] & A1L151 # !state[2] & hour[0];
hour_display[0] = DFFEA(hour_display[0]_lut_out, GLOBAL(clk1hz), , , A1L581, hour[0], clr);


--K71L1 is lpm_divide:i_rtl_5|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00011|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~40 at LC6_B8
--operation mode is normal

K71L1 = hour_display[2];


--K71L2 is lpm_divide:i_rtl_5|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00011|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~41 at LC1_B10
--operation mode is normal

K71L2 = hour_display[2];


--K71L3 is lpm_divide:i_rtl_5|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00011|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~42 at LC2_B3
--operation mode is normal

K71L3 = K71L2 $ hour_display[3] $ K41L2;


--K71L4 is lpm_divide:i_rtl_5|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00011|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~43 at LC3_B3
--operation mode is normal

K71L4 = K71L2 & (hour_display[3] $ K41L2);


--K41L1 is lpm_divide:i_rtl_5|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00009|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~12 at LC4_B3
--operation mode is normal

K41L1 = hour_display[3] $ hour_display[4];


--K41L2 is lpm_divide:i_rtl_5|sign_div_unsign:divider|alt_u_div:divider|lpm_add_sub:$00009|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~13 at LC6_B3
--operation mode is normal

K41L2 = hour_display[3] & hour_display[4];


--A1L621 is i~8227 at LC1_C6
--operation mode is normal

A1L621 = E3_q[4] # E3_q[5] # !E3_q[3] # !E3_q[2];


--A1L721 is i~8229 at LC8_C8
--operation mode is normal

A1L721 = A1L621 # !A1L271 # !E3_q[1] # !E3_q[0];


--inc_reg is inc_reg at LC6_A24
--operation mode is normal

inc_reg_lut_out = A1L351 & inc_reg # !A1L351 & inc;
inc_reg = DFFEA(inc_reg_lut_out, GLOBAL(clk1hz), , , A1L91, , );


--A1L54 is hhtemp[0]~38 at LC4_A24
--operation mode is normal

A1L54 = !inc_reg & A1L91 & inc & state[2];


--A1L191 is mmtemp[0]~6 at LC2_A24
--operation mode is normal

A1L191 = !state[1] & !state[0] & A1L54;


--E5L41 is lpm_counter:mmtemp_rtl_3|alt_counter_f10ke:wysi_counter|counter_cell[5]~50 at LC7_A11
--operation mode is normal

E5L41 = E5_q[2] # !E5_q[0] # !E5_q[3] # !E5_q[1];


--E5L31 is lpm_counter:mmtemp_rtl_3|alt_counter_f10ke:wysi_counter|counter_cell[5]~1 at LC8_A11
--operation mode is normal

E5L31 = E5L41 # !A1L191 # !E5_q[5] # !E5_q[4];


--min[3] is min[3] at LC1_A19
--operation mode is normal

min[3]_lut_out = A1L751 # A1L851 & min[3];
min[3] = DFFEA(min[3]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--min[0] is min[0] at LC1_A18
--operation mode is up_dn_cntr

min[0]_lut_out = (min[0] & A1L651) # (A1L951 & !A1L651);
min[0] = DFFEA(min[0]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );

--K32_cout[0] is lpm_add_sub:i_rtl_7|addcore:adder|a_csnbuffer:result_node|cout[0] at LC1_A18
--operation mode is up_dn_cntr

K32_cout[0] = CARRY(min[0]);


--min[2] is min[2] at LC2_A13
--operation mode is normal

min[2]_lut_out = A1L061 # A1L851 & min[2];
min[2] = DFFEA(min[2]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--min[1] is min[1] at LC2_A19
--operation mode is normal

min[1]_lut_out = A1L161 # A1L851 & min[1];
min[1] = DFFEA(min[1]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--min[4] is min[4] at LC3_A13
--operation mode is normal

min[4]_lut_out = A1L261 # A1L851 & min[4];
min[4] = DFFEA(min[4]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--min[5] is min[5] at LC8_A19
--operation mode is normal

min[5]_lut_out = A1L361 # A1L851 & min[5];
min[5] = DFFEA(min[5]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--A1L44 is hhtemp[0]~5 at LC1_A7
--operation mode is normal

A1L44 = A1L54 & state[0];


--E2L21 is lpm_counter:hhtemp_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~43 at LC2_A7
--operation mode is normal

E2L21 = E2_q[3] # !E2_q[0] # !E2_q[2] # !E2_q[4];


--E2L11 is lpm_counter:hhtemp_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~1 at LC8_A7
--operation mode is normal

E2L11 = E2L21 # !E2_q[1] # !state[0] # !A1L54;


--hour[2] is hour[2] at LC6_A16
--operation mode is normal

hour[2]_lut_out = A1L561 # !A1L471 & hour[2];
hour[2] = DFFEA(hour[2]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--hour[0] is hour[0] at LC2_A15
--operation mode is up_dn_cntr

hour[0]_lut_out = (hour[0] & A1L84) # (A1L66 & !A1L84);
hour[0] = DFFEA(hour[0]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );

--K02_cout[0] is lpm_add_sub:i_rtl_6|addcore:adder|a_csnbuffer:result_node|cout[0] at LC2_A15
--operation mode is up_dn_cntr

K02_cout[0] = CARRY(hour[0]);


--hour[3] is hour[3] at LC4_A16
--operation mode is normal

hour[3]_lut_out = A1L661 # !A1L471 & hour[3];
hour[3] = DFFEA(hour[3]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--hour[4] is hour[4] at LC3_A17
--operation mode is normal

hour[4]_lut_out = A1L761 # !A1L471 & hour[4];
hour[4] = DFFEA(hour[4]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--hour[1] is hour[1] at LC3_A16
--operation mode is normal

hour[1]_lut_out = A1L861;
hour[1] = DFFEA(hour[1]_lut_out, GLOBAL(clk1hz), !clr, , A1L581, , );


--A1L91 is clock~0 at LC1_A8
--operation mode is normal

A1L91 = !en & !clr;


--A1L821 is i~8230 at LC5_A14
--operation mode is normal

A1L821 = state[0] & min_display[0] # !state[0] & E5_q[0];


--A1L921 is i~8231 at LC8_A3
--operation mode is normal

A1L921 = state[0] & min_display[1] # !state[0] & E5_q[1];


--A1L031 is i~8232 at LC8_A6
--operation mode is normal

A1L031 = state[0] & min_display[2] # !state[0] & E5_q[2];


--A1L131 is i~8233 at LC2_A10
--operation mode is normal

A1L131 = state[0] & min_display[3] # !state[0] & E5_q[3];


--A1L231 is i~8234 at LC8_A2
--operation mode is normal

A1L231 = state[0] & min_display[4] # !state[0] & E5_q[4];


--A1L331 is i~8235 at LC4_A9
--operation mode is normal

A1L331 = state[0] & min_display[5] # !state[0] & E5_q[5];


--G1L1 is lpm_divide:i_rtl_5|sign_div_unsign:divider|alt_u_div:divider|StageOut[3][3]~100 at LC7_B3
--operation mode is normal

G1L1 = K41L1 & K41L2;


--G1L2 is lpm_divide:i_rtl_5|sign_div_unsign:divider|alt_u_div:divider|StageOut[3][3]~101 at LC8_B3
--operation mode is normal

G1L2 = !K41L2 & hour_display[4];


--A1L431 is i~8236 at LC4_A20
--operation mode is normal

A1L431 = state[1] & !state[0] & E2_q[4] # !state[1] & (state[0] & E2_q[4] # !state[0] & hour_display[4]);


--A1L531 is i~8237 at LC3_B7
--operation mode is normal

A1L531 = A1L24 # A1L83 & A1L92 # !A1L43;


--A1L171 is i~8284 at LC4_B7
--operation mode is normal

A1L171 = (A1L24 & A1L171 & (A1L83 # A1L43) # !A1L24 & (A1L43 # !A1L83)) & CASCADE(A1L531);


--A1L76 is i529~0 at LC1_A24
--operation mode is normal

A1L76 = !inc_reg & inc;


--A1L631 is i~8244 at LC5_A24
--operation mode is normal

A1L631 = state[0] & !state[2] & (!state[1] # !A1L76) # !state[0] & state[1];


--A1L731 is i~8245 at LC3_A23
--operation mode is normal