shfter.v

cordic IC implement for fast cordic calculate. Including test bench. feature: 1. slicon proved.

/**********************************************************************
*  Author      :   畗產狽(Shyu,Jia-jye)(ZYCA)
*  DATA        :   2004/11/17
*  FILE        :   shfter.v
*  VERSION     :   1
*  DESCRIPTION :   Shifter.
*                  en: output enable signal.
*                  s_dir: 0: right; 1: left.
*                  rot: 1: rotate shift( left or right). 0: normal mode.
*                  sign: shift right with sign extension; when 1'b1 SR
*                        will result in sign extension, ROT regardless 
*                        this function, so rot=1'b0.
*                        Only function in normal mode.
*                  shft_val: shift how many bits.
*  VERSION NOTE:   1. Created @ 2004.11.17
**********************************************************************/

module          shfter  (
                          s_dir,
                          rot,
                          sign,
                          shft_val,
                          d_in,
                          q_out                          
                          );
  
  parameter  W_DATA = 8;
  parameter  W_SVAL = 3;//Shift value width
  
  input                       s_dir;
  input                       rot;
  input                       sign;
  input    [ W_SVAL- 1: 0]    shft_val;
  input    [ W_DATA- 1: 0]    d_in;
                              
  output   [ W_DATA- 1: 0]    q_out;
                              
  reg      [ W_DATA- 1: 0]    d_in_sign;
                              
  wire     [ W_DATA- 1: 0]    q_out;
  wire     [ 2* W_DATA- 1: 0] d_in_tmp; 
  wire     [ W_DATA- 1: 0]    shft_l;
  wire     [ W_DATA- 1: 0]    shft_r; 
  wire     [ W_DATA- 1: 0]    rot_shft_l;
  wire     [ W_DATA- 1: 0]    rot_shft_r;
  wire     [ W_DATA- 1: 0]    nor_shft_l;
  wire     [ W_DATA- 1: 0]    nor_shft_r;
  wire     [ 2* W_DATA- 1: 0] d_in_tmp_wire;
  wire     [ 2* W_DATA- 1: 0] d_in_sign_wire;
                              
  integer                     i;
  
  assign  d_in_tmp_wire = { d_in, d_in};
  
  //Rotate shift right/left result
  assign  rot_shft_l = d_in_tmp[ 2* W_DATA- 1: W_DATA];
  assign  rot_shft_r = d_in_tmp[ W_DATA- 1: 0];
  
  //Normal shift right/left result
  assign  nor_shft_l = d_in << shft_val;
  assign  nor_shft_r = ( sign)? ( d_in_sign_wire >> shft_val):
                                ( d_in >> shft_val);
  
  
  
  //Shift right with sign extension
  //assign  d_in_sign_wire = { W_DATA{ d_in[ W_DATA- 1]}, d_in};
  assign  d_in_sign_wire = { d_in_sign, d_in};
  
  assign  d_in_tmp = ( s_dir)? ( d_in_tmp_wire << shft_val):
                               ( d_in_tmp_wire >> shft_val);
                                         
  //Shift rotate or not
  assign  shft_l = ( rot)? rot_shft_l: nor_shft_l;
  assign  shft_r = ( rot)? rot_shft_r: nor_shft_r;
  
  assign  q_out = ( s_dir)? shft_l: shft_r;
  
  always @( d_in)
    for ( i= 0; i< W_DATA; i= i+ 1)
      d_in_sign[ i] = d_in[ W_DATA- 1];
  
endmodule