mux21.v

来自「cordic IC implement for fast cordic calc」· Verilog 代码 · 共 33 行

/**********************************************************************
*  Author      :   畗產狽(Shyu,Jia-jye)(ZYCA)
*  DATA        :   2004/10/22
*  FILE        :   mux21.v
*  VERSION     :   1
*  DESCRIPTION :   Multiplexer 2 to 1 for DSP IC.
*                  
*  VERSION NOTE:   1. Created @ 2004.10.22
**********************************************************************/

module          mux21(
                       in1,
                       in0,
                       sel,
                       dout
                       );
                       
  parameter  W_DATA = 8;
  
  input                     sel;
  input    [ W_DATA- 1: 0]  in1;
  input    [ W_DATA- 1: 0]  in0;
  
  output   [ W_DATA- 1: 0]  dout;
  
  wire                      sel;
  wire     [ W_DATA- 1: 0]  in1;
  wire     [ W_DATA- 1: 0]  in0;  
  wire     [ W_DATA- 1: 0]  dout;
  
  assign  dout = ( sel) ? in1: in0;
  
endmodule