rot_half_pi.v

来自「cordic IC implement for fast cordic calc」· Verilog 代码 · 共 45 行

/**********************************************************************
*  Author      :   畗產狽(Shyu,Jia-jye)(ZYCA)
*  DATA        :   2004/11/17
*  FILE        :   rot_half_pi.v
*  VERSION     :   1
*  DESCRIPTION :   Rotate pi/2 fo CORDIC first stage.
*                  pass : used to bypass (1'b1) signal or not(1'b0).
*                  dir : 1'b1: rotate -pi/2 1'b0: rotate +pi/2.
*  VERSION NOTE:   1. Created @ 2004.11.17
**********************************************************************/

module          rot_half_pi( 
                             pass,
                             dir,
                             in_a,
                             in_b,
                             out_a,
                             out_b
                             );
  
  parameter  W_DATA = 8;
  
  input                      pass;
  input                      dir;  
  input    [ W_DATA- 1: 0]   in_a;
  input    [ W_DATA- 1: 0]   in_b;
  
  output   [ W_DATA- 1: 0]   out_a;
  output   [ W_DATA- 1: 0]   out_b;
  
  wire     [ W_DATA- 1: 0]   out_a;
  wire     [ W_DATA- 1: 0]   out_b;
  
  wire     [ W_DATA- 1: 0]   in_a_n;
  wire     [ W_DATA- 1: 0]   in_b_n;
  
  assign  out_a = ( pass)? in_a: in_a_n;
  assign  out_b = ( pass)? in_b: in_b_n;
  
  //assign  in_a_n = ( dir)? ( ~ in_b) + 1'b1: in_b;
  //assign  in_b_n = ( dir)? in_a :( ~ in_a) + 1'b1;
  assign  in_a_n = ( dir)? in_b:( ~ in_b) + 1'b1;
  assign  in_b_n = ( dir)? ( ~ in_a) + 1'b1: in_a;

endmodule