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📄 block1.bdf

📁 verilog实践 alu_cpu 算数运算器的verilog实现
💻 BDF
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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
(header "graphic" (version "1.3"))
(symbol
	(rect 160 120 336 248)
	(text "alu_cpu" (rect 5 0 42 12)(font "Arial" ))
	(text "inst" (rect 8 112 25 124)(font "Arial" ))
	(port
		(pt 0 32)
		(input)
		(text "data[7..0]" (rect 0 0 47 12)(font "Arial" ))
		(text "data[7..0]" (rect 21 27 68 39)(font "Arial" ))
		(line (pt 0 32)(pt 16 32)(line_width 3))
	)
	(port
		(pt 0 48)
		(input)
		(text "accum[7..0]" (rect 0 0 59 12)(font "Arial" ))
		(text "accum[7..0]" (rect 21 43 80 55)(font "Arial" ))
		(line (pt 0 48)(pt 16 48)(line_width 3))
	)
	(port
		(pt 0 64)
		(input)
		(text "alu_clk" (rect 0 0 34 12)(font "Arial" ))
		(text "alu_clk" (rect 21 59 55 71)(font "Arial" ))
		(line (pt 0 64)(pt 16 64)(line_width 1))
	)
	(port
		(pt 0 80)
		(input)
		(text "opcode[2..0]" (rect 0 0 61 12)(font "Arial" ))
		(text "opcode[2..0]" (rect 21 75 82 87)(font "Arial" ))
		(line (pt 0 80)(pt 16 80)(line_width 3))
	)
	(port
		(pt 176 32)
		(output)
		(text "alu_out[7..0]" (rect 0 0 61 12)(font "Arial" ))
		(text "alu_out[7..0]" (rect 94 27 155 39)(font "Arial" ))
		(line (pt 176 32)(pt 160 32)(line_width 3))
	)
	(port
		(pt 176 48)
		(output)
		(text "zero" (rect 0 0 20 12)(font "Arial" ))
		(text "zero" (rect 135 43 155 55)(font "Arial" ))
		(line (pt 176 48)(pt 160 48)(line_width 1))
	)
	(parameter
		"ADD"
		"B\"000\""
		""
	)
	(parameter
		"ANDD"
		"B\"001\""
		""
	)
	(parameter
		"XORR"
		"B\"010\""
		""
	)
	(parameter
		"LDA"
		"B\"011\""
		""
	)
	(parameter
		"STO"
		"B\"100\""
		""
	)
	(parameter
		"JMP"
		"B\"101\""
		""
	)
	(drawing
		(rectangle (rect 16 16 160 112)(line_width 1))
	)
	(annotation_block (parameter)(rect 336 16 440 120))
)

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