alu_cpu.map.summary

来自「verilog实践 alu_cpu 算数运算器的verilog实现」· SUMMARY 代码 · 共 11 行

Analysis & Synthesis Status : Successful - Thu Mar 22 10:23:23 2007
Quartus II Version : 6.1 Build 201 11/27/2006 SJ Full Version
Revision Name : alu_cpu
Top-level Entity Name : alu_cpu
Family : Cyclone
Total logic elements : 36
Total pins : 29
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0