dds.ucf

《Verilog-HDL实践与应用系统设计》一书中的光盘源文件

// Template UCF file created by the Project Navigator
NET "CLK" LOC = "p6";
NET "DATA<0>" LOC = "p8";
NET "DATA<1>" LOC = "p9";
NET "DATA<2>" LOC = "p39";
NET "DOUT<0>" LOC = "p35";
NET "DOUT<1>" LOC = "p40";
NET "DOUT<2>" LOC = "p42";
NET "DOUT<3>" LOC = "p34";
NET "DOUT<4>" LOC = "p33";
NET "DOUT<5>" LOC = "p29";
NET "DOUT<6>" LOC = "p28";
NET "DOUT<7>" LOC = "p27";
NET "DOUT<8>" LOC = "p26";
NET "DOUT<9>" LOC = "p25";
NET "DOUT<10>" LOC = "p24";
NET "MCLK" LOC = "p2";
NET "RB" LOC = "p1";