_lockpins.tcl

来自「《Verilog-HDL实践与应用系统设计》一书中的光盘源文件」· TCL 代码 · 共 32 行

set _IsWindows [string equal $tcl_platform(platform) windows]
set _gydFile {CNT4.gyd} 
set _ucfFile {CNT4.ucf} 
regsub -all {\B} $_gydFile / _gydFile
regsub -all {\B} $_ucfFile / _ucfFile
if { $_IsWindows } {
regsub -all / $_gydFile \\ _gydFile
regsub -all / $_ucfFile \\ _ucfFile
}
set _ErrorCode 0
if ![file exists $_ucfFile] {
set _ucfFileHandle [open $_ucfFile a]
puts $_ucfFileHandle "//"
close $_ucfFileHandle
}
file delete -force _test.dat
if ![file exists $_gydFile] {
exeputs "Error: $_gydFile does not exist. \n You must fit the design successfully before running this utility." 
exit 2 }
file copy -force $_ucfFile _test.ucf
set _ErrorCode [catch {exec pin2ucf $_gydFile -o $_ucfFile -r CNT4._lcr} _pinResults]
exeputs  $_pinResults
file copy -force $_ucfFile _test2.ucf
exec chkdate -1
if [file exists _test.dat] {
if [file exists CNT4.ngd] {
file rename -force CNT4.ngd last_used.ngd
exeputs "The Implement Design process will now be reset so that your constraint changes will be read.\n" }
} else { exeputs "Existing implementation results (if any) will be retained.\n" }
file delete -force _test.ucf _test2.ucf _test.dat
exit $_ErrorCode