cnt4.ucf

来自「《Verilog-HDL实践与应用系统设计》一书中的光盘源文件」· UCF 代码 · 共 20 行

// Template UCF file created by the Project Navigator
NET "CLK" LOC = "p2";
NET "Q<0>" LOC = "p5";
NET "Q<1>" LOC = "p6";
NET "Q<2>" LOC = "p7";
NET "Q<3>" LOC = "p8";
NET "RSTB" LOC = "p1";

#PINLOCK_BEGIN

#Wed Jul 31 17:32:50 2002

NET "RSTB"           LOC =  "S:PIN1";
NET "CLK"            LOC =  "S:PIN2";
NET "Q<0>"           LOC =  "S:PIN5";
NET "Q<1>"           LOC =  "S:PIN6";
NET "Q<2>"           LOC =  "S:PIN7";
NET "Q<3>"           LOC =  "S:PIN8";
#PINLOCK_END