liner_adder.sim.rpt

为了给大家紧张的工作减轻点负担

; Total output ports with no 1/0-value coverage       ; 34           ;
; Total output ports with no 1-value coverage         ; 34           ;
; Total output ports with no 0-value coverage         ; 34           ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                              ;
+-------------------------------------------------------------------+-------------------------------------------------------------------+------------------+
; Node Name                                                         ; Output Port Name                                                  ; Output Port Type ;
+-------------------------------------------------------------------+-------------------------------------------------------------------+------------------+
; |liner_adder|sum~5404                                             ; |liner_adder|sum~5404                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:1:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:1:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5405                                             ; |liner_adder|sum~5405                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:1:l1|cout~7    ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:1:l1|cout~7    ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:1:l2|cout~7    ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:1:l2|cout~7    ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:2:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:2:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5406                                             ; |liner_adder|sum~5406                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:2:l1|cout~54   ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:2:l1|cout~54   ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:2:l2|cout~77   ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:2:l2|cout~77   ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:3:l1|sumbit~53 ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:3:l1|sumbit~53 ; combout          ;
; |liner_adder|sum~5407                                             ; |liner_adder|sum~5407                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:3:l1|cout~113  ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:3:l1|cout~113  ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:3:l2|cout~137  ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:3:l2|cout~137  ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:4:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:4:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5408                                             ; |liner_adder|sum~5408                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:4:l1|cout~162  ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:4:l1|cout~162  ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:4:l2|cout~185  ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:4:l2|cout~185  ; combout          ;
; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:5:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:0:l1|fulladd:\G1:5:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5409                                             ; |liner_adder|sum~5409                                             ; combout          ;
; |liner_adder|sum~5410                                             ; |liner_adder|sum~5410                                             ; combout          ;
; |liner_adder|sum~5411                                             ; |liner_adder|sum~5411                                             ; combout          ;
; |liner_adder|sum~5412                                             ; |liner_adder|sum~5412                                             ; combout          ;
; |liner_adder|c[1]~2000                                            ; |liner_adder|c[1]~2000                                            ; combout          ;
; |liner_adder|c[1]~2001                                            ; |liner_adder|c[1]~2001                                            ; combout          ;
; |liner_adder|c[1]~2002                                            ; |liner_adder|c[1]~2002                                            ; combout          ;
; |liner_adder|c[1]~2003                                            ; |liner_adder|c[1]~2003                                            ; combout          ;
; |liner_adder|c[1]~2004                                            ; |liner_adder|c[1]~2004                                            ; combout          ;
; |liner_adder|c[1]~2005                                            ; |liner_adder|c[1]~2005                                            ; combout          ;
; |liner_adder|sum~5413                                             ; |liner_adder|sum~5413                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:1:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:1:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5414                                             ; |liner_adder|sum~5414                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:1:l1|cout~7    ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:1:l1|cout~7    ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:1:l2|cout~7    ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:1:l2|cout~7    ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:2:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:2:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5415                                             ; |liner_adder|sum~5415                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:2:l1|cout~54   ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:2:l1|cout~54   ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:2:l2|cout~77   ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:2:l2|cout~77   ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:3:l1|sumbit~53 ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:3:l1|sumbit~53 ; combout          ;
; |liner_adder|sum~5416                                             ; |liner_adder|sum~5416                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:3:l1|cout~113  ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:3:l1|cout~113  ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:3:l2|cout~137  ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:3:l2|cout~137  ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:4:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:4:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5417                                             ; |liner_adder|sum~5417                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:4:l1|cout~162  ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:4:l1|cout~162  ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:4:l2|cout~185  ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:4:l2|cout~185  ; combout          ;
; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:5:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:1:l1|fulladd:\G1:5:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5418                                             ; |liner_adder|sum~5418                                             ; combout          ;
; |liner_adder|sum~5419                                             ; |liner_adder|sum~5419                                             ; combout          ;
; |liner_adder|sum~5420                                             ; |liner_adder|sum~5420                                             ; combout          ;
; |liner_adder|sum~5421                                             ; |liner_adder|sum~5421                                             ; combout          ;
; |liner_adder|c[2]~2006                                            ; |liner_adder|c[2]~2006                                            ; combout          ;
; |liner_adder|c[2]~2007                                            ; |liner_adder|c[2]~2007                                            ; combout          ;
; |liner_adder|c[2]~2008                                            ; |liner_adder|c[2]~2008                                            ; combout          ;
; |liner_adder|c[2]~2010                                            ; |liner_adder|c[2]~2010                                            ; combout          ;
; |liner_adder|c[2]~2011                                            ; |liner_adder|c[2]~2011                                            ; combout          ;
; |liner_adder|sum~5422                                             ; |liner_adder|sum~5422                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:1:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:1:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5423                                             ; |liner_adder|sum~5423                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:1:l2|cout~7    ; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:1:l2|cout~7    ; combout          ;
; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:2:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:2:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5424                                             ; |liner_adder|sum~5424                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:2:l2|cout~77   ; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:2:l2|cout~77   ; combout          ;
; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:3:l1|sumbit~53 ; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:3:l1|sumbit~53 ; combout          ;
; |liner_adder|sum~5425                                             ; |liner_adder|sum~5425                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:3:l2|cout~137  ; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:3:l2|cout~137  ; combout          ;
; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:4:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:4:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5426                                             ; |liner_adder|sum~5426                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:4:l2|cout~185  ; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:4:l2|cout~185  ; combout          ;
; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:5:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:2:l1|fulladd:\G1:5:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5427                                             ; |liner_adder|sum~5427                                             ; combout          ;
; |liner_adder|sum~5428                                             ; |liner_adder|sum~5428                                             ; combout          ;
; |liner_adder|sum~5429                                             ; |liner_adder|sum~5429                                             ; combout          ;
; |liner_adder|sum~5430                                             ; |liner_adder|sum~5430                                             ; combout          ;
; |liner_adder|c[3]~2012                                            ; |liner_adder|c[3]~2012                                            ; combout          ;
; |liner_adder|c[3]~2013                                            ; |liner_adder|c[3]~2013                                            ; combout          ;
; |liner_adder|c[3]~2014                                            ; |liner_adder|c[3]~2014                                            ; combout          ;
; |liner_adder|c[3]~2016                                            ; |liner_adder|c[3]~2016                                            ; combout          ;
; |liner_adder|c[3]~2017                                            ; |liner_adder|c[3]~2017                                            ; combout          ;
; |liner_adder|sum~5431                                             ; |liner_adder|sum~5431                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:3:l1|fulladd:\G1:1:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:3:l1|fulladd:\G1:1:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5432                                             ; |liner_adder|sum~5432                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:3:l1|fulladd:\G1:1:l2|cout~7    ; |liner_adder|liner_adder_unit:\G1:3:l1|fulladd:\G1:1:l2|cout~7    ; combout          ;
; |liner_adder|liner_adder_unit:\G1:3:l1|fulladd:\G1:2:l1|sumbit~3  ; |liner_adder|liner_adder_unit:\G1:3:l1|fulladd:\G1:2:l1|sumbit~3  ; combout          ;
; |liner_adder|sum~5433                                             ; |liner_adder|sum~5433                                             ; combout          ;
; |liner_adder|liner_adder_unit:\G1:3:l1|fulladd:\G1:2:l2|cout~77   ; |liner_adder|liner_adder_unit:\G1:3:l1|fulladd:\G1:2:l2|cout~77   ; combout          ;
; |liner_adder|liner_adder_unit:\G1:3:l1|fulladd:\G1:3:l1|sumbit~53 ; |liner_adder|liner_adder_unit:\G1:3:l1|fulladd:\G1:3:l1|sumbit~53 ; combout          ;