carry_propogate_adder.map.summary

为了给大家紧张的工作减轻点负担

Analysis & Synthesis Status : Successful - Thu Dec 13 01:07:38 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : carry_propogate_adder
Top-level Entity Name : carry_propogate_adder
Family : Stratix
Total logic elements : 56
Total pins : 86
Total virtual pins : 0
Total memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0