cycloneiii_3c25_start_niosii_standard_sopc.ptf.pre_generation_ptf

来自「nios里面用自定义指令集来实现三角函数」· PRE_GENERATION_PTF 代码 · 共 2,216 行 · 第 1/5 页

PRE_GENERATION_PTF
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            Bus_Type = "avalon";
            Is_Asynchronous = "0";
            DBS_Big_Endian = "0";
            Adapts_To = "";
            Do_Stream_Reads = "0";
            Do_Stream_Writes = "0";
            Max_Address_Width = "32";
            Data_Width = "32";
            Address_Width = "28";
            Maximum_Burst_Size = "1";
            Register_Incoming_Signals = "0";
            Register_Outgoing_Signals = "0";
            Interleave_Bursts = "0";
            Linewrap_Bursts = "0";
            Burst_On_Burst_Boundaries_Only = "0";
            Always_Burst_Max_Burst = "0";
            Is_Big_Endian = "0";
            Is_Enabled = "1";
         }
         PORT_WIRING 
         {
            PORT dcm0_address
            {
               type = "address";
               width = "28";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT dcm0_byteenable
            {
               type = "byteenable";
               width = "4";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT dcm0_clken
            {
               type = "clken";
               width = "1";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT dcm0_read
            {
               type = "read";
               width = "1";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT dcm0_readdata
            {
               type = "readdata";
               width = "32";
               direction = "input";
               Is_Enabled = "1";
            }
            PORT dcm0_readdatavalid
            {
               type = "readdatavalid";
               width = "1";
               direction = "input";
               Is_Enabled = "1";
            }
            PORT dcm0_waitrequest
            {
               type = "waitrequest";
               width = "1";
               direction = "input";
               Is_Enabled = "1";
            }
            PORT dcm0_write
            {
               type = "write";
               width = "1";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT dcm0_writedata
            {
               type = "writedata";
               width = "32";
               direction = "output";
               Is_Enabled = "1";
            }
         }
         MEMORY_MAP 
         {
            Entry onchip_ram/s2
            {
               address = "0x09010000";
               span = "0x00008000";
            }
         }
      }
      MASTER data_master
      {
         SYSTEM_BUILDER_INFO 
         {
            Has_IRQ = "1";
            Irq_Scheme = "individual_requests";
            Bus_Type = "avalon";
            Is_Asynchronous = "0";
            DBS_Big_Endian = "0";
            Adapts_To = "";
            Do_Stream_Reads = "0";
            Do_Stream_Writes = "0";
            Max_Address_Width = "32";
            Data_Width = "32";
            Address_Width = "28";
            Maximum_Burst_Size = "1";
            Register_Incoming_Signals = "0";
            Register_Outgoing_Signals = "0";
            Interleave_Bursts = "0";
            Linewrap_Bursts = "0";
            Burst_On_Burst_Boundaries_Only = "0";
            Always_Burst_Max_Burst = "0";
            Is_Big_Endian = "0";
            Is_Enabled = "1";
            Is_Data_Master = "1";
         }
         PORT_WIRING 
         {
            PORT d_irq
            {
               type = "irq";
               width = "32";
               direction = "input";
               Is_Enabled = "1";
            }
            PORT d_address
            {
               type = "address";
               width = "28";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT d_byteenable
            {
               type = "byteenable";
               width = "4";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT d_read
            {
               type = "read";
               width = "1";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT d_readdata
            {
               type = "readdata";
               width = "32";
               direction = "input";
               Is_Enabled = "1";
            }
            PORT d_readdatavalid
            {
               type = "readdatavalid";
               width = "1";
               direction = "input";
               Is_Enabled = "1";
            }
            PORT d_waitrequest
            {
               type = "waitrequest";
               width = "1";
               direction = "input";
               Is_Enabled = "1";
            }
            PORT d_write
            {
               type = "write";
               width = "1";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT d_writedata
            {
               type = "writedata";
               width = "32";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT jtag_debug_module_debugaccess_to_roms
            {
               type = "debugaccess";
               width = "1";
               direction = "output";
               Is_Enabled = "1";
            }
         }
         MEMORY_MAP 
         {
            Entry altmemddr_bridge/s1
            {
               address = "0x02000000";
               span = "0x02000000";
            }
            Entry altmemddr/s1
            {
               address = "0x02000000";
               span = "0x02000000";
            }
            Entry pipeline_bridge_peripherals/s1
            {
               address = "0x08000000";
               span = "0x00000100";
            }
            Entry jtag_uart/avalon_jtag_slave
            {
               address = "0x08000080";
               span = "0x00000008";
            }
            Entry button_pio/s1
            {
               address = "0x08000060";
               span = "0x00000010";
            }
            Entry sys_clk_timer/s1
            {
               address = "0x08000000";
               span = "0x00000020";
            }
            Entry high_res_timer/s1
            {
               address = "0x08000020";
               span = "0x00000020";
            }
            Entry led_pio/s1
            {
               address = "0x08000070";
               span = "0x00000010";
            }
            Entry sysid/control_slave
            {
               address = "0x08000088";
               span = "0x00000008";
            }
            Entry sys_pll/s1
            {
               address = "0x08000040";
               span = "0x00000020";
            }
            Entry cpu/jtag_debug_module
            {
               address = "0x09008800";
               span = "0x00000800";
            }
            Entry pipeline_bridge_before_atb/s1
            {
               address = "0x06000000";
               span = "0x02000000";
            }
            Entry ext_ssram/s1
            {
               address = "0x07000000";
               span = "0x00100000";
            }
            Entry ext_flash/s1
            {
               address = "0x06000000";
               span = "0x01000000";
            }
         }
      }
      MASTER tightly_coupled_instruction_master_0
      {
         SYSTEM_BUILDER_INFO 
         {
            Bus_Type = "avalon";
            Is_Asynchronous = "0";
            DBS_Big_Endian = "0";
            Adapts_To = "";
            Do_Stream_Reads = "0";
            Do_Stream_Writes = "0";
            Max_Address_Width = "32";
            Data_Width = "32";
            Address_Width = "28";
            Maximum_Burst_Size = "1";
            Register_Incoming_Signals = "0";
            Register_Outgoing_Signals = "0";
            Interleave_Bursts = "0";
            Linewrap_Bursts = "0";
            Burst_On_Burst_Boundaries_Only = "0";
            Always_Burst_Max_Burst = "0";
            Is_Big_Endian = "0";
            Is_Enabled = "1";
         }
         PORT_WIRING 
         {
            PORT icm0_address
            {
               type = "address";
               width = "28";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT icm0_read
            {
               type = "read";
               width = "1";
               direction = "output";
               Is_Enabled = "1";
            }
            PORT icm0_readdata
            {
               type = "readdata";
               width = "32";
               direction = "input";
               Is_Enabled = "1";
            }
            PORT icm0_readdatavalid
            {
               type = "readdatavalid";
               width = "1";
               direction = "input";
               Is_Enabled = "1";
            }
            PORT icm0_waitrequest
            {
               type = "waitrequest";
               width = "1";
               direction = "input";
               Is_Enabled = "1";
            }
            PORT icm0_clken
            {
               type = "clken";
               width = "1";
               direction = "output";
               Is_Enabled = "1";
            }
         }
         MEMORY_MAP 
         {
            Entry onchip_ram/s1
            {
               address = "0x09010000";
               span = "0x00008000";
            }
         }
      }
      WIZARD_SCRIPT_ARGUMENTS 
      {
         cache_has_dcache = "1";
         cache_dcache_size = "4096";
         cache_dcache_line_size = "32";
         cache_dcache_bursts = "0";
         cache_dcache_ram_block_type = "AUTO";
         num_tightly_coupled_data_masters = "1";
         gui_num_tightly_coupled_data_masters = "1";
         gui_include_tightly_coupled_data_masters = "1";
         gui_omit_avalon_data_master = "0";
         cache_has_icache = "1";
         cache_icache_size = "4096";
         cache_icache_line_size = "32";
         cache_icache_ram_block_type = "AUTO";
         cache_icache_bursts = "0";
         num_tightly_coupled_instruction_masters = "1";
         gui_num_tightly_coupled_instruction_masters = "1";
         gui_include_tightly_coupled_instruction_masters = "1";
         debug_level = "2";
         include_oci = "1";
         oci_sbi_enabled = "1";
         oci_num_xbrk = "0";
         oci_num_dbrk = "0";
         oci_dbrk_trace = "0";
         oci_dbrk_pairs = "0";
         oci_onchip_trace = "0";
         oci_offchip_trace = "0";
         oci_data_trace = "0";
         include_third_party_debug_port = "0";
         oci_trace_addr_width = "7";
         oci_trigger_arming = "1";
         oci_debugreq_signals = "0";
         oci_embedded_pll = "1";
         oci_num_pm = "0";
         oci_pm_width = "32";
         performance_counters_present = "0";
         performance_counters_width = "32";
         always_encrypt = "1";
         debug_simgen = "0";
         activate_model_checker = "0";
         activate_test_end_checker = "0";
         activate_trace = "1";
         activate_monitors = "1";
         clear_x_bits_ld_non_bypass = "1";
         bit_31_bypass_dcache = "1";
         always_bypass_dcache = "0";
         hdl_sim_caches_cleared = "1";
         hbreak_test = "0";
         allow_full_address_range = "0";
         branch_prediction_type = "Dynamic";
         bht_ptr_sz = "8";
         bht_index_pc_only = "0";
         gui_branch_prediction_type = "Automatic";
         full_waveform_signals = "0";
         export_pcb = "0";
         avalon_debug_port_present = "0";
         gui_illegal_instructions_trap = "0";
         gui_illegal_memory_access_detection = "0";
         illegal_mem_exc = "0";
         slave_access_error_exc = "0";
         division_error_exc = "0";
         gui_mmu_present = "0";
         process_id_num_bits = "10";
         dtlb_ptr_sz = "7";
         itlb_ptr_sz = "7";
         dtlb_num_ways = "4";
         itlb_num_ways = "4";
         udtlb_num_entries = "6";
         uitlb_num_entries = "4";
         fast_tlb_miss_exc_slave = "";
         fast_tlb_miss_exc_offset = "0x00000000";
         hardware_divide_present = "1";
         gui_hardware_divide_setting = "1";
         hardware_multiply_present = "1";
         hardware_multiply_impl = "embedded_mul";
         shift_rot_impl = "fast_le_shift";
         gui_hardware_multiply_setting = "embedded_mul_fast_le_shift";
         reset_slave = "ext_flash/s1";
         break_slave = "cpu/jtag_debug_module";
         exc_slave = "onchip_ram/s1";
         reset_offset = "0x00000000";
         break_offset = "0x00000020";
         exc_offset = "0x00000020";
         cpu_reset = "0";
         CPU_Implementation = "fast";
         cpu_selection = "f";
         device_family_id = "CYCLONEIII";
         address_stall_present = "1";
         dsp_block_supports_shift = "0";
         mrams_present = "0";
         do_generate = "1";
         cpuid_value = "0";
         cpuid_sz = "1";
         dont_overwrite_cpuid = "1";
         allow_legacy_sdk = "1";
         legacy_sdk_support = "1";
         inst_addr_width = "28";
         data_addr_width = "28";
      }

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