⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 niosii_c_log.txt

📁 nios num clock verilog code
💻 TXT
字号:
Altera SOPC Builder Version 5.00 Build 171
Copyright (c) 1999-2005 Altera Corporation.  All rights reserved.


# 2008.05.04 11:19:54 (*) mk_custom_sdk starting
# 2008.05.04 11:19:54 (*) Reading project D:/test/sopc_led/niosii_c.ptf.

# 2008.05.04 11:19:54 (*) Finding all CPUs
# 2008.05.04 11:19:54 (*) Finding all available components

# 2008.05.04 11:19:54 (*) Found 48 components

# 2008.05.04 11:19:55 (*) Finding all peripherals

# 2008.05.04 11:19:56 (*) Finding software components

# 2008.05.04 11:19:57 (*) (Legacy SDK Generation Skipped)
# 2008.05.04 11:19:57 (*) (All TCL Script Generation Skipped)
# 2008.05.04 11:19:57 (*) (No Libraries Built)
# 2008.05.04 11:19:57 (*) (Contents Generation Skipped)
# 2008.05.04 11:19:57 (*) mk_custom_sdk finishing

# 2008.05.04 11:19:57 (*) Starting generation for system: niosii_c.

.
.
.
.
..
.
.
.
.
.

# 2008.05.04 11:20:00 (*) Running Generator Program for ext_flash

# 2008.05.04 11:20:01 (*) Running Generator Program for onchip_ram_4K

# 2008.05.04 11:20:03 (*) Running Generator Program for cpu

# 2008.05.04 11:20:03 (*)   IP functional simulation model enabled: Uncheck System Generation Simulation box for faster generation if HDL Simulation not required.
# 2008.05.04 11:20:05 (*)   Checking for plaintext license.
# 2008.05.04 11:20:05 (*)   Plaintext license not found.
# 2008.05.04 11:20:05 (*)   Checking for encrypted license (non-evaluation).
# 2008.05.04 11:20:05 (*)   Encrypted license found.  SOF will not be time-limited.
# 2008.05.04 11:20:12 (*)   Creating encrypted HDL
# 2008.05.04 11:20:14 (*)   Creating IP functional simulation model

# 2008.05.04 11:20:26 (*) Running Generator Program for sysy_clk_timer

# 2008.05.04 11:20:28 (*) Running Generator Program for led_pio

# 2008.05.04 11:20:29 (*) Running Generator Program for button_pio

# 2008.05.04 11:20:30 (*) Running Generator Program for jtag_uart

# 2008.05.04 11:20:32 (*) Running Generator Program for sysid

# 2008.05.04 11:20:33 (*) Running Generator Program for uart

# 2008.05.04 11:20:35 (*) Running Generator Program for sdram

# 2008.05.04 11:20:37 (*) Running Generator Program for lcd_16207_0

.
.

# 2008.05.04 11:20:38 (*) Running Test Generator Program for onchip_ram_4K

# 2008.05.04 11:20:40 (*) Running Test Generator Program for sdram

# 2008.05.04 11:20:41 (*) Making arbitration and system (top) modules.

# 2008.05.04 11:20:51 (*) Generating Quartus symbol for top level: niosii_c

# 2008.05.04 11:20:51 (*) Generating Symbol D:/test/sopc_led/niosii_c.bsf

# 2008.05.04 11:20:51 (*) Creating command-line system-generation script: D:/test/sopc_led/niosii_c_generation_script

# 2008.05.04 11:20:51 (*) Running setup for HDL simulator: modelsim


Building ModelSim Project

'vsim' 不是内部或外部命令,也不是可运行的程序
或批处理文件。

# 2008.05.04 11:20:52 (*) Setting up Quartus with niosii_c_setup_quartus.tcl
c:/altera/quartus50/bin/quartus_sh -t niosii_c_setup_quartus.tcl


Info: *******************************************************************
Info: Running Quartus II Shell
    Info: Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version
    Info: Copyright (C) 1991-2005 Altera Corporation. All rights reserved.
    Info: Your use of Altera Corporation's design tools, logic functions 
    Info: and other software and tools, and its AMPP partner logic       
    Info: functions, and any output files any of the foregoing           
    Info: (including device programming or simulation files), and any    

    Info: associated documentation or information are expressly subject  
    Info: to the terms and conditions of the Altera Program License      

    Info: Subscription Agreement, Altera MegaCore Function License       
    Info: Agreement, or other applicable license agreement, including,   
    Info: without limitation, that your use is for the sole purpose of   
    Info: programming logic devices manufactured by Altera and sold by   
    Info: Altera or its authorized distributors.  Please refer to the    
    Info: applicable agreement for further details.
    Info: Processing started: Sun May 04 11:20:53 2008
Info: Command: quartus_sh -t niosii_c_setup_quartus.tcl


Info: Evaluation of Tcl script niosii_c_setup_quartus.tcl was successful

# 2008.05.04 11:20:53 (*) Completed generation for system: niosii_c.
# 2008.05.04 11:20:53 (*) THE FOLLOWING SYSTEM ITEMS HAVE BEEN GENERATED:
  SOPC Builder database : D:/test/sopc_led/niosii_c.ptf 
  System HDL Model : D:/test/sopc_led/niosii_c.v 
  System Generation Script : D:/test/sopc_led/niosii_c_generation_script 
  HDL Simulation Directory : D:/test/sopc_led/niosii_c_sim 

# 2008.05.04 11:20:53 (*) SUCCESS: SYSTEM GENERATION COMPLETED.


Press 'Exit' to exit.

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -