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关于波形发生功能的Verilog代码和Quartus文件完整文档。

wire \sld_hub_inst|jtag_state_machine|state[6] ;
wire \sld_hub_inst|jtag_state_machine|state[7] ;
wire \sld_hub_inst|jtag_state_machine|state[4] ;
wire \sld_hub_inst|jtag_state_machine|state[5] ;
wire \sld_hub_inst|jtag_state_machine|state[8] ;
wire \sld_hub_inst|jtag_state_machine|state[1] ;
wire \sld_hub_inst|jtag_state_machine|state[2] ;
wire \sld_hub_inst|jtag_state_machine|state[9] ;
wire \sld_hub_inst|jtag_state_machine|tms_cnt[0] ;
wire \sld_hub_inst|jtag_state_machine|tms_cnt[1] ;
wire \sld_hub_inst|jtag_state_machine|tms_cnt[2] ;
wire \sld_hub_inst|jtag_state_machine|state~212 ;
wire \sld_hub_inst|jtag_state_machine|state[0] ;
wire \sld_hub_inst|jtag_ir_register|dffs[9] ;
wire \sld_hub_inst|jtag_ir_register|dffs[8] ;
wire \sld_hub_inst|jtag_ir_register|dffs[7] ;
wire \sld_hub_inst|jtag_ir_register|dffs[6] ;
wire \sld_hub_inst|jtag_ir_register|dffs[5] ;
wire \sld_hub_inst|jtag_ir_register|dffs[4] ;
wire \sld_hub_inst|jtag_ir_register|dffs[3] ;
wire \sld_hub_inst|jtag_ir_register|dffs[2] ;
wire \sld_hub_inst|reduce_nor~87 ;
wire \sld_hub_inst|jtag_ir_register|dffs[1] ;
wire \sld_hub_inst|jtag_ir_register|dffs[0] ;
wire \sld_hub_inst|reduce_nor~86 ;
wire \sld_hub_inst|jtag_debug_mode_usr1 ;
wire \sld_hub_inst|process2~0 ;
wire \sld_hub_inst|OK_TO_UPDATE_IR_Q ;
wire \sld_hub_inst|GEN_SHADOW_IRF~0 ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:2:S_IRF|Q[1] ;
wire \sld_hub_inst|IRF_ENA_ENABLE~20 ;
wire \sld_hub_inst|IRF_ENA_0|Q[0] ;
wire \sld_hub_inst|jtag_debug_mode_usr0 ;
wire \sld_hub_inst|jtag_debug_mode~2 ;
wire \sld_hub_inst|comb~96 ;
wire \sld_hub_inst|comb~97 ;
wire \sld_hub_inst|comb~98 ;
wire \sld_hub_inst|instruction_decoder|auto_generated|dffe1a[2] ;
wire \sld_hub_inst|IRF_ENABLE[1]~124 ;
wire \sld_hub_inst|GEN_SHADOW_IRF~18 ;
wire \sld_hub_inst|IRF_ENABLE[2]~126 ;
wire \sld_hub_inst|\GEN_IRF:2:IRF|Q[1] ;
wire \sld_hub_inst|jtag_debug_mode~171 ;
wire \sld_hub_inst|jtag_debug_mode ;
wire \sld_hub_inst|comb~95 ;
wire \sld_hub_inst|BROADCAST_ENA~27 ;
wire \sld_hub_inst|node_ena~40 ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:2:S_IRF|Q[3] ;
wire \sld_hub_inst|\GEN_IRF:2:IRF|Q[3] ;
wire \auto_signaltap_0|ela_control|trigger_setup_ena ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[41] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[40] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[39] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[38] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[37] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[36] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[35] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[34] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[33] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[32] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[31] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[30] ;
wire \altera_internal_jtag~TCKUTAP ;
wire \sld_hub_inst|IRF_ENA|Q[0] ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|no_name_gen~28 ;
wire \sld_hub_inst|GEN_SHADOW_IRF~1 ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[1] ;
wire \sld_hub_inst|IRF_ENABLE[1]~125 ;
wire \sld_hub_inst|\GEN_IRF:1:IRF|Q[1] ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|process1~3 ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[3] ;
wire \sld_hub_inst|\GEN_IRF:1:IRF|Q[3] ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~78 ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0]~78COUT1_90 ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1] ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~74 ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[1]~74COUT1 ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2] ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~82 ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[2]~82COUT1_91 ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[3] ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|reduce_nor~1 ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_data_shift_cntr_reg[0] ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~34 ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr~0 ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|ram_rom_incr_addr ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[4] ;
wire \sld_hub_inst|\GEN_IRF:1:IRF|Q[4] ;
wire \inst1|altsyncram_component|auto_generated|mgl_prim2|is_in_use_reg ;
wire \sld_hub_inst|instruction_decoder|auto_generated|dffe1a[3] ;
wire \sld_hub_inst|IR_MUX_SEL[0]~23 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[0] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella0~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[1] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella1~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella1~COUTCOUT1_2 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[2] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella2~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella2~COUTCOUT1_2 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[3] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella3~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella3~COUTCOUT1_2 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[4] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella4~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella4~COUTCOUT1_2 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[5] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella5~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[6] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella6~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella6~COUTCOUT1_2 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[7] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella7~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella7~COUTCOUT1_2 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[8] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella8~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella8~COUTCOUT1_2 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[9] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella9~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella9~COUTCOUT1_2 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[10] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|counter_cella10~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth_segment:seg_mgr|\non_zero_sample_depth_gen:segment_addr_counter|auto_generated|safe_q[11] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[10] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[9] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[29] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[28] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[27] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[26] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[25] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[24] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[23] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[22] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[21] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[20] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[19] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[18] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16] ;
wire \auto_signaltap_0|acq_trigger_in_reg[5] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[13] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[9] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[8] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2] ;