📄 sha1_wt.vhd
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-------------------------------------------------------------------------------------------------- Fri Jan 4 15:12:08 2008---- Design name : sha1-- Author : nhm-- Company : asic---- Description : --------------------------------------------------------------------------------------------------LIBRARY ieee;USE ieee.std_logic_1164.all;USE ieee.std_logic_arith.all;USE ieee.std_logic_unsigned.all;ENTITY sha1_Wt IS PORT ( W13_I : IN std_logic_vector(31 DOWNTO 0); W8_I : IN std_logic_vector(31 DOWNTO 0); W2_I : IN std_logic_vector(31 DOWNTO 0); W0_I : IN std_logic_vector(31 DOWNTO 0); COUNTER : IN std_logic_vector(6 DOWNTO 0); CLK : IN std_logic; WT_O : OUT std_logic_vector(31 DOWNTO 0) );END sha1_Wt;ARCHITECTURE behavioral OF sha1_Wt IS SIGNAL SHA1_Wt_1 : std_logic_vector(31 DOWNTO 0); BEGIN SHA1_Wt_1 <= ((W13_I XOR W8_I) XOR W2_I) XOR W0_I ; PROCESS(COUNTER,SHA1_Wt_1,W0_I,W2_I,W8_I,W13_I) BEGIN CASE COUNTER IS --select input data WHEN "0000000" => WT_O <= W0_I; WHEN "0000001" => WT_O <= W2_I; WHEN "0000010" => WT_O <= W8_I; WHEN "0000011" => WT_O <= W13_I; WHEN "0000100" => WT_O <= W0_I; WHEN "0000101" => WT_O <= W2_I; WHEN "0000110" => WT_O <= W8_I; WHEN "0000111" => WT_O <= W13_I; WHEN "0001000" => WT_O <= W0_I; WHEN "0001001" => WT_O <= W2_I; WHEN "0001010" => WT_O <= W8_I; WHEN "0001011" => WT_O <= W13_I; WHEN "0001100" => WT_O <= W0_I; WHEN "0001101" => WT_O <= W2_I; WHEN "0001110" => WT_O <= W8_I; WHEN "0001111" => WT_O <= W13_I; WHEN OTHERS => WT_O <= SHA1_Wt_1(30 DOWNTO 0) & SHA1_Wt_1(31); END CASE; END PROCESS; END behavioral;
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