_primary.vhd

来自「Booth Algorithm 是一種較簡潔的有號數字相乘的方法」· VHDL 代码 · 共 15 行

library verilog;
use verilog.vl_types.all;
entity booth16 is
    generic(
        width            : integer := 16
    );
    port(
        clk             : in     vl_logic;
        reset           : in     vl_logic;
        a               : in     vl_logic_vector;
        b               : in     vl_logic_vector;
        p               : out    vl_logic_vector
    );
end booth16;