xfft.qip

fir滤波器-verilog

set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "XFFT.v"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "fft_pack_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_math_pkg_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_lib_pkg_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_text_pkg_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_roundsat_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_avalon_streaming_source_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_avalon_streaming_sink_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_avalon_streaming_controller_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_alufp_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_aslf_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_castftox_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_castxtof_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_clzf_fft_72.vhd"]
set_global_assignment -name VHDL_FILE [file join D:/altera/72/ip/fft/lib "auk_dspip_fpcompiler_mulfp_fft_72.vhd"]
set_global_assignment -name SEARCH_PATH  D:/altera/72/ip/fft/lib