add_sub_4qe.tdf

复乘法器的FPGA实现

--lpm_add_sub CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 DEVICE_FAMILY="Stratix II" LPM_DIRECTION="ADD" LPM_WIDTH=16 ONE_INPUT_IS_CONSTANT="NO" dataa datab result
--VERSION_BEGIN 5.1 cbx_cycloneii 2005:08:30:10:31:44:SJ cbx_lpm_add_sub 2005:09:30:12:13:06:SJ cbx_mgl 2005:10:09:07:39:04:SJ cbx_stratix 2005:10:07:15:53:08:SJ cbx_stratixii 2005:07:27:05:50:56:SJ  VERSION_END


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--synthesis_resources = lut 16 
SUBDESIGN add_sub_4qe
( 
	dataa[15..0]	:	input;
	datab[15..0]	:	input;
	result[15..0]	:	output;
) 
BEGIN 
	result[] = dataa[] + datab[];
END;
--VALID FILE