test.fdo

xilinx环境下开发vhdl语言串行接口设计

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Fri Oct 31 17:07:12 中国标准时间 2008
##
vlib work
vcom -93 -explicit  bps.vhdl
vcom -93 -explicit  xmit.vhdl
vcom -93 -explicit  rev.vhdl
vcom -93 -explicit  ctrl.vhdl
vcom -93 -explicit  serial.vhdl
vcom -93 -explicit  test.vhw
vsim -t 1ps   -lib work test
do test.udo
view wave
add wave *
view structure
view signals
run -all