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📄 paobiao.fit.qmsg

📁 给出了数字跑表的源代码
💻 QMSG
📖 第 1 页 / 共 3 页
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{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "2.171 ns register register " "Info: Estimated most critical path is register to register delay of 2.171 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns MSL\[2\]~reg0 1 REG LAB_X2_Y17 5 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X2_Y17; Fanout = 5; REG Node = 'MSL\[2\]~reg0'" {  } { { "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" "" { MSL[2]~reg0 } "NODE_NAME" } } { "paobiao.v" "" { Text "D:/Program Files/quartus/Design/paobiao/paobiao.v" 16 0 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.605 ns) + CELL(0.075 ns) 0.680 ns Equal0~90 2 COMB LAB_X1_Y17 3 " "Info: 2: + IC(0.605 ns) + CELL(0.075 ns) = 0.680 ns; Loc. = LAB_X1_Y17; Fanout = 3; COMB Node = 'Equal0~90'" {  } { { "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" "0.680 ns" { MSL[2]~reg0 Equal0~90 } "NODE_NAME" } } { "paobiao.v" "" { Text "D:/Program Files/quartus/Design/paobiao/paobiao.v" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.102 ns) + CELL(0.366 ns) 1.148 ns MSH\[0\]~360 3 COMB LAB_X1_Y17 3 " "Info: 3: + IC(0.102 ns) + CELL(0.366 ns) = 1.148 ns; Loc. = LAB_X1_Y17; Fanout = 3; COMB Node = 'MSH\[0\]~360'" {  } { { "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" "0.468 ns" { Equal0~90 MSH[0]~360 } "NODE_NAME" } } { "paobiao.v" "" { Text "D:/Program Files/quartus/Design/paobiao/paobiao.v" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.318 ns) + CELL(0.705 ns) 2.171 ns MSH\[0\]~reg0 4 REG LAB_X1_Y17 6 " "Info: 4: + IC(0.318 ns) + CELL(0.705 ns) = 2.171 ns; Loc. = LAB_X1_Y17; Fanout = 6; REG Node = 'MSH\[0\]~reg0'" {  } { { "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" "1.023 ns" { MSH[0]~360 MSH[0]~reg0 } "NODE_NAME" } } { "paobiao.v" "" { Text "D:/Program Files/quartus/Design/paobiao/paobiao.v" 16 0 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.146 ns ( 52.79 % ) " "Info: Total cell delay = 1.146 ns ( 52.79 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.025 ns ( 47.21 % ) " "Info: Total interconnect delay = 1.025 ns ( 47.21 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" "2.171 ns" { MSL[2]~reg0 Equal0~90 MSH[0]~360 MSH[0]~reg0 } "NODE_NAME" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 0 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "X10_Y0 X20_Y9 " "Info: The peak interconnect region extends from location X10_Y0 to location X20_Y9" {  } {  } 0 0 "The peak interconnect region extends from location %1!s! to location %2!s!" 0 0}  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:01 " "Info: Fitter routing operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Warning" "WFYGR_FYGR_GLOBAL_ROUTE_FROM_DCLK_USES_REG_ROUTING" "CLR Dedicated Clock Pin_M21 " "Warning: Global route sourced by node \"CLR\", which is placed in Dedicated Clock \"Pin_M21\", begins its route with non-global routing to its global destinations. This will lead to increased delay along these routes" {  } { { "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLR } "NODE_NAME" } } { "paobiao.v" "" { Text "D:/Program Files/quartus/Design/paobiao/paobiao.v" 3 -1 0 } } { "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLR } "NODE_NAME" } }  } 0 0 "Global route sourced by node \"%1!s!\", which is placed in %2!s! \"%3!s!\", begins its route with non-global routing to its global destinations. This will lead to increased delay along these routes" 0 0}
{ "Warning" "WFIOMGR_RESERVE_ASSIGNMENT_FOR_UNUSED_PINS_IS_DEFAULT" "As output driving ground " "Warning: The Reserve All Unused Pins setting has not been specified, and will default to 'As output driving ground'." {  } {  } 0 0 "The Reserve All Unused Pins setting has not been specified, and will default to '%1!s!'." 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 3 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "202 " "Info: Allocated 202 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Tue Oct 21 15:01:37 2008 " "Info: Processing ended: Tue Oct 21 15:01:37 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:13 " "Info: Elapsed time: 00:00:13" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "D:/Program Files/quartus/Design/paobiao/paobiao.fit.smsg " "Info: Generated suppressed messages file D:/Program Files/quartus/Design/paobiao/paobiao.fit.smsg" {  } {  } 0 0 "Generated suppressed messages file %1!s!" 0 0}

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