clk_choose.vhd

数字显示当前的小时、分钟、秒； 2、可以预置为12小时计时显示和24小时计时显示； 3、一个调节键

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CLK_CHOOSE IS
PORT(CLK_MC,CLK_1HZ,SEC_COUT,MIN_COUT:IN STD_LOGIC;
SET_TIME:IN STD_LOGIC_VECTOR(1 DOWNTO 0);
HOUR_CLK,MIN_CLK,SEC_CLK:OUT STD_LOGIC);
END ENTITY;
ARCHITECTURE BEHAV OF CLK_CHOOSE IS
BEGIN     
PROCESS (SET_TIME,CLK_MC,CLK_1HZ)
BEGIN
CASE SET_TIME IS
WHEN "01" =>
SEC_CLK<=CLK_MC;
 MIN_CLK<='0';
HOUR_CLK<='0';
WHEN "10" =>
SEC_CLK<='0';
MIN_CLK<=CLK_MC;
HOUR_CLK<='0';
WHEN "11" =>
SEC_CLK<='0';
MIN_CLK<='0';
HOUR_CLK<=CLK_MC;
 WHEN OTHERS =>
SEC_CLK<=CLK_1HZ;
MIN_CLK<=SEC_COUT;
HOUR_CLK<=MIN_COUT;
END CASE;
END PROCESS;
END BEHAV;