singt1.map.qmsg

来自「采用vhdl语言编程」· QMSG 代码 · 共 54 行 · 第 1/5 页

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.1 Build 201 11/27/2006 SJ Full Version " "Info: Version 6.1 Build 201 11/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Oct 21 10:38:39 2008 " "Info: Processing started: Tue Oct 21 10:38:39 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off singt1 -c singt1 " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off singt1 -c singt1" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "data_rom.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file data_rom.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 data_rom-SYN " "Info: Found design unit 1: data_rom-SYN" {  } { { "data_rom.vhd" "" { Text "D:/实验3suc/data_rom.vhd" 49 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 data_rom " "Info: Found entity 1: data_rom" {  } { { "data_rom.vhd" "" { Text "D:/实验3suc/data_rom.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "singt1.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file singt1.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 singt1-DACC " "Info: Found design unit 1: singt1-DACC" {  } { { "singt1.vhd" "" { Text "D:/实验3suc/singt1.vhd" 13 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 singt1 " "Info: Found entity 1: singt1" {  } { { "singt1.vhd" "" { Text "D:/实验3suc/singt1.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Block1.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file Block1.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 Block1 " "Info: Found entity 1: Block1" {  } { { "Block1.bdf" "" { Schematic "D:/实验3suc/Block1.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "Block1 " "Info: Elaborating entity \"Block1\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "singt1 singt1:inst " "Info: Elaborating entity \"singt1\" for hierarchy \"singt1:inst\"" {  } { { "Block1.bdf" "inst" { Schematic "D:/实验3suc/Block1.bdf" { { 152 288 416 248 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "data_rom singt1:inst\|data_rom:u1 " "Info: Elaborating entity \"data_rom\" for hierarchy \"singt1:inst\|data_rom:u1\"" {  } { { "singt1.vhd" "u1" { Text "D:/实验3suc/singt1.vhd" 44 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/61/quartus/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/61/quartus/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "c:/altera/61/quartus/libraries/megafunctions/altsyncram.tdf" 434 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram singt1:inst\|data_rom:u1\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"singt1:inst\|data_rom:u1\|altsyncram:altsyncram_component\"" {  } { { "data_rom.vhd" "altsyncram_component" { Text "D:/实验3suc/data_rom.vhd" 80 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}