mux_vab.tdf

来自「采用vhdl语言编程」· TDF 代码 · 共 54 行

TDF
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--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone" LPM_SIZE=2 LPM_WIDTH=8 LPM_WIDTHS=1 data result sel
--VERSION_BEGIN 6.1 cbx_lpm_mux 2006:04:25:15:10:08:SJ cbx_mgl 2006:10:27:16:08:48:SJ  VERSION_END


--  Copyright (C) 1991-2006 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.



--synthesis_resources = lut 8 
SUBDESIGN mux_vab
( 
	data[15..0]	:	input;
	result[7..0]	:	output;
	sel[0..0]	:	input;
) 
VARIABLE 
	result_node[7..0]	: WIRE;
	sel_node[0..0]	: WIRE;
	w_data160w[1..0]	: WIRE;
	w_data174w[1..0]	: WIRE;
	w_data186w[1..0]	: WIRE;
	w_data198w[1..0]	: WIRE;
	w_data210w[1..0]	: WIRE;
	w_data222w[1..0]	: WIRE;
	w_data234w[1..0]	: WIRE;
	w_data246w[1..0]	: WIRE;

BEGIN 
	result[] = result_node[];
	result_node[] = ( ((sel_node[] & w_data246w[1..1]) # ((! sel_node[]) & w_data246w[0..0])), ((sel_node[] & w_data234w[1..1]) # ((! sel_node[]) & w_data234w[0..0])), ((sel_node[] & w_data222w[1..1]) # ((! sel_node[]) & w_data222w[0..0])), ((sel_node[] & w_data210w[1..1]) # ((! sel_node[]) & w_data210w[0..0])), ((sel_node[] & w_data198w[1..1]) # ((! sel_node[]) & w_data198w[0..0])), ((sel_node[] & w_data186w[1..1]) # ((! sel_node[]) & w_data186w[0..0])), ((sel_node[] & w_data174w[1..1]) # ((! sel_node[]) & w_data174w[0..0])), ((sel_node[] & w_data160w[1..1]) # ((! sel_node[]) & w_data160w[0..0])));
	sel_node[] = ( sel[0..0]);
	w_data160w[] = ( data[8..8], data[0..0]);
	w_data174w[] = ( data[9..9], data[1..1]);
	w_data186w[] = ( data[10..10], data[2..2]);
	w_data198w[] = ( data[11..11], data[3..3]);
	w_data210w[] = ( data[12..12], data[4..4]);
	w_data222w[] = ( data[13..13], data[5..5]);
	w_data234w[] = ( data[14..14], data[6..6]);
	w_data246w[] = ( data[15..15], data[7..7]);
END;
--VALID FILE

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