singt1.tan.qmsg

来自「采用vhdl语言编程」· QMSG 代码 · 共 9 行 · 第 1/5 页

{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "1 " "Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "singt1:inst\|CLK_CNT\[4\] " "Info: Detected ripple clock \"singt1:inst\|CLK_CNT\[4\]\" as buffer" {  } { { "singt1.vhd" "" { Text "D:/实验3suc/singt1.vhd" 25 -1 0 } } { "c:/altera/61/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/61/quartus/bin/Assignment Editor.qase" 1 { { 0 "singt1:inst\|CLK_CNT\[4\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|safe_q\[3\] memory sld_signaltap:auto_signaltap_0\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_lji2:auto_generated\|ram_block1a4~porta_datain_reg0 140.75 MHz 7.105 ns Internal " "Info: Clock \"clk\" has Internal fmax of 140.75 MHz between source register \"sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|safe_q\[3\]\" and destination memory \"sld_signaltap:auto_signaltap_0\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_lji2:auto_generated\|ram_block1a4~porta_datain_reg0\" (period= 7.105 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.783 ns + Longest register memory " "Info: + Longest register to memory delay is 6.783 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|safe_q\[3\] 1 REG LC_X16_Y12_N6 21 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X16_Y12_N6; Fanout = 21; REG Node = 'sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|safe_q\[3\]'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] } "NODE_NAME" } } { "db/cntr_1fk.tdf" "" { Text "D:/实验3suc/db/cntr_1fk.tdf" 147 8 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.527 ns) + CELL(0.575 ns) 1.102 ns sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|counter_cella3~COUTCOUT1 2 COMB LC_X16_Y12_N6 2 " "Info: 2: + IC(0.527 ns) + CELL(0.575 ns) = 1.102 ns; Loc. = LC_X16_Y12_N6; Fanout = 2; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|counter_cella3~COUTCOUT1'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "1.102 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella3~COUTCOUT1 } "NODE_NAME" } } { "db/cntr_1fk.tdf" "" { Text "D:/实验3suc/db/cntr_1fk.tdf" 57 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.182 ns sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|counter_cella4~COUTCOUT1 3 COMB LC_X16_Y12_N7 2 " "Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 1.182 ns; Loc. = LC_X16_Y12_N7; Fanout = 2; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|counter_cella4~COUTCOUT1'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella3~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella4~COUTCOUT1 } "NODE_NAME" } } { "db/cntr_1fk.tdf" "" { Text "D:/实验3suc/db/cntr_1fk.tdf" 65 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.262 ns sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|counter_cella5~COUTCOUT1 4 COMB LC_X16_Y12_N8 2 " "Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 1.262 ns; Loc. = LC_X16_Y12_N8; Fanout = 2; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|counter_cella5~COUTCOUT1'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella4~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella5~COUTCOUT1 } "NODE_NAME" } } { "db/cntr_1fk.tdf" "" { Text "D:/实验3suc/db/cntr_1fk.tdf" 73 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 1.520 ns sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|counter_cella6~COUT 5 COMB LC_X16_Y12_N9 6 " "Info: 5: + IC(0.000 ns) + CELL(0.258 ns) = 1.520 ns; Loc. = LC_X16_Y12_N9; Fanout = 6; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|counter_cella6~COUT'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "0.258 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella5~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella6~COUT } "NODE_NAME" } } { "db/cntr_1fk.tdf" "" { Text "D:/实验3suc/db/cntr_1fk.tdf" 81 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.136 ns) 1.656 ns sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|counter_cella11~COUT 6 COMB LC_X16_Y11_N4 2 " "Info: 6: + IC(0.000 ns) + CELL(0.136 ns) = 1.656 ns; Loc. = LC_X16_Y11_N4; Fanout = 2; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|counter_cella11~COUT'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "0.136 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella6~COUT sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella11~COUT } "NODE_NAME" } } { "db/cntr_1fk.tdf" "" { Text "D:/实验3suc/db/cntr_1fk.tdf" 121 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.621 ns) 2.277 ns sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|cout 7 COMB LC_X16_Y11_N6 3 " "Info: 7: + IC(0.000 ns) + CELL(0.621 ns) = 2.277 ns; Loc. = LC_X16_Y11_N6; Fanout = 3; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|cout'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "0.621 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella11~COUT sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|cout } "NODE_NAME" } } { "db/cntr_1fk.tdf" "" { Text "D:/实验3suc/db/cntr_1fk.tdf" 179 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.416 ns) + CELL(0.114 ns) 2.807 ns sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~116 8 COMB LC_X16_Y11_N8 4 " "Info: 8: + IC(0.416 ns) + CELL(0.114 ns) = 2.807 ns; Loc. = LC_X16_Y11_N8; Fanout = 4; COMB Node = 'sld_signaltap:auto_signaltap_0\|sld_ela_control:ela_control\|sld_ela_seg_state_machine:sm2\|status_out~116'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "0.530 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|cout sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~116 } "NODE_NAME" } } { "c:/altera/61/quartus/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/61/quartus/libraries/megafunctions/sld_ela_control.vhd" 1211 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.444 ns) + CELL(0.292 ns) 3.543 ns sld_signaltap:auto_signaltap_0\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_lji2:auto_generated\|decode_fga:decode2\|eq_node\[0\]~195 9 COMB LC_X16_Y11_N7 104 " "Info: 9: + IC(0.444 ns) + CELL(0.292 ns) = 3.543 ns; Loc. = LC_X16_Y11_N7; Fanout = 104; COMB Node = 'sld_signaltap:auto_signaltap_0\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_lji2:auto_generated\|decode_fga:decode2\|eq_node\[0\]~195'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "0.736 ns" { sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~116 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|decode_fga:decode2|eq_node[0]~195 } "NODE_NAME" } } { "db/decode_fga.tdf" "" { Text "D:/实验3suc/db/decode_fga.tdf" 29 9 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.275 ns) + CELL(0.965 ns) 6.783 ns sld_signaltap:auto_signaltap_0\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_lji2:auto_generated\|ram_block1a4~porta_datain_reg0 10 MEM M4K_X17_Y5 1 " "Info: 10: + IC(2.275 ns) + CELL(0.965 ns) = 6.783 ns; Loc. = M4K_X17_Y5; Fanout = 1; MEM Node = 'sld_signaltap:auto_signaltap_0\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_lji2:auto_generated\|ram_block1a4~porta_datain_reg0'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "3.240 ns" { sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|decode_fga:decode2|eq_node[0]~195 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } "NODE_NAME" } } { "db/altsyncram_lji2.tdf" "" { Text "D:/实验3suc/db/altsyncram_lji2.tdf" 176 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.121 ns ( 46.01 % ) " "Info: Total cell delay = 3.121 ns ( 46.01 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.662 ns ( 53.99 % ) " "Info: Total interconnect delay = 3.662 ns ( 53.99 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "6.783 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella3~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella4~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella5~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella6~COUT sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella11~COUT sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|cout sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~116 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|decode_fga:decode2|eq_node[0]~195 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } "NODE_NAME" } } { "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "6.783 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella3~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella4~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella5~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella6~COUT sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella11~COUT sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|cout sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~116 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|decode_fga:decode2|eq_node[0]~195 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } { 0.000ns 0.527ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.416ns 0.444ns 2.275ns } { 0.000ns 0.575ns 0.080ns 0.080ns 0.258ns 0.136ns 0.621ns 0.114ns 0.292ns 0.965ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.005 ns - Smallest " "Info: - Smallest clock skew is -0.005 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.920 ns + Shortest memory " "Info: + Shortest clock path from clock \"clk\" to destination memory is 2.920 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_153 350 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 350; CLK Node = 'clk'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "Block1.bdf" "" { Schematic "D:/实验3suc/Block1.bdf" { { 176 104 272 192 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.729 ns) + CELL(0.722 ns) 2.920 ns sld_signaltap:auto_signaltap_0\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_lji2:auto_generated\|ram_block1a4~porta_datain_reg0 2 MEM M4K_X17_Y5 1 " "Info: 2: + IC(0.729 ns) + CELL(0.722 ns) = 2.920 ns; Loc. = M4K_X17_Y5; Fanout = 1; MEM Node = 'sld_signaltap:auto_signaltap_0\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_lji2:auto_generated\|ram_block1a4~porta_datain_reg0'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "1.451 ns" { clk sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } "NODE_NAME" } } { "db/altsyncram_lji2.tdf" "" { Text "D:/实验3suc/db/altsyncram_lji2.tdf" 176 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.191 ns ( 75.03 % ) " "Info: Total cell delay = 2.191 ns ( 75.03 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.729 ns ( 24.97 % ) " "Info: Total interconnect delay = 0.729 ns ( 24.97 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "2.920 ns" { clk sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } "NODE_NAME" } } { "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "2.920 ns" { clk clk~out0 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } { 0.000ns 0.000ns 0.729ns } { 0.000ns 1.469ns 0.722ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.925 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.925 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_153 350 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 350; CLK Node = 'clk'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "Block1.bdf" "" { Schematic "D:/实验3suc/Block1.bdf" { { 176 104 272 192 "clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.745 ns) + CELL(0.711 ns) 2.925 ns sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|safe_q\[3\] 2 REG LC_X16_Y12_N6 21 " "Info: 2: + IC(0.745 ns) + CELL(0.711 ns) = 2.925 ns; Loc. = LC_X16_Y12_N6; Fanout = 21; REG Node = 'sld_signaltap:auto_signaltap_0\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_1fk:auto_generated\|safe_q\[3\]'" {  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "1.456 ns" { clk sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] } "NODE_NAME" } } { "db/cntr_1fk.tdf" "" { Text "D:/实验3suc/db/cntr_1fk.tdf" 147 8 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns ( 74.53 % ) " "Info: Total cell delay = 2.180 ns ( 74.53 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.745 ns ( 25.47 % ) " "Info: Total interconnect delay = 0.745 ns ( 25.47 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "2.925 ns" { clk sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] } "NODE_NAME" } } { "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "2.925 ns" { clk clk~out0 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "2.920 ns" { clk sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } "NODE_NAME" } } { "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "2.920 ns" { clk clk~out0 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } { 0.000ns 0.000ns 0.729ns } { 0.000ns 1.469ns 0.722ns } "" } } { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "2.925 ns" { clk sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] } "NODE_NAME" } } { "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "2.925 ns" { clk clk~out0 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "db/cntr_1fk.tdf" "" { Text "D:/实验3suc/db/cntr_1fk.tdf" 147 8 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.093 ns + " "Info: + Micro setup delay of destination is 0.093 ns" {  } { { "db/altsyncram_lji2.tdf" "" { Text "D:/实验3suc/db/altsyncram_lji2.tdf" 176 2 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "6.783 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella3~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella4~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella5~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella6~COUT sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella11~COUT sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|cout sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~116 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|decode_fga:decode2|eq_node[0]~195 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } "NODE_NAME" } } { "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "6.783 ns" { sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella3~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella4~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella5~COUTCOUT1 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella6~COUT sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|counter_cella11~COUT sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|cout sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out~116 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|decode_fga:decode2|eq_node[0]~195 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } { 0.000ns 0.527ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.416ns 0.444ns 2.275ns } { 0.000ns 0.575ns 0.080ns 0.080ns 0.258ns 0.136ns 0.621ns 0.114ns 0.292ns 0.965ns } "" } } { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "2.920 ns" { clk sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } "NODE_NAME" } } { "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "2.920 ns" { clk clk~out0 sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0 } { 0.000ns 0.000ns 0.729ns } { 0.000ns 1.469ns 0.722ns } "" } } { "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/61/quartus/bin/TimingClosureFloorplan.fld" "" "2.925 ns" { clk sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] } "NODE_NAME" } } { "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/61/quartus/bin/Technology_Viewer.qrui" "2.925 ns" { clk clk~out0 sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}