stp1.stp

采用vhdl语言编程

        </trigger_input_vec>
        <data_input_vec>
          <wire name="dout[0]" tap_mode="classic" type="output pin"/>
          <wire name="dout[1]" tap_mode="classic" type="output pin"/>
          <wire name="dout[2]" tap_mode="classic" type="output pin"/>
          <wire name="dout[3]" tap_mode="classic" type="output pin"/>
          <wire name="dout[4]" tap_mode="classic" type="output pin"/>
          <wire name="dout[5]" tap_mode="classic" type="output pin"/>
          <wire name="dout[6]" tap_mode="classic" type="output pin"/>
          <wire name="dout[7]" tap_mode="classic" type="output pin"/>
        </data_input_vec>
      </signal_vec>
      <presentation>
        <data_view>
          <bus is_signal_inverted="no" link="all" name="dout" order="lsb_to_msb" radix="line" state="expand" type="output pin">
            <net is_signal_inverted="no" name="dout[0]"/>