singt1.tan.rpt

采用vhdl语言编程

+-------------------------------------------------------+--------------------+------+----+-------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                                          ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name              ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; clk                          ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
; altera_internal_jtag~TCKUTAP ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'clk'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                                                                                                              ; To                                                                                                                                             ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_datain_reg0   ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg0  ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg1  ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg2  ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg3  ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg4  ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg5  ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg6  ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg7  ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg8  ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg9  ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg10 ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.75 MHz ( period = 7.105 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a4~porta_address_reg11 ; clk        ; clk      ; None                        ; None                      ; 6.783 ns                ;
; N/A                                     ; 140.85 MHz ( period = 7.100 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a7~porta_datain_reg0   ; clk        ; clk      ; None                        ; None                      ; 6.778 ns                ;
; N/A                                     ; 140.85 MHz ( period = 7.100 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a7~porta_address_reg0  ; clk        ; clk      ; None                        ; None                      ; 6.778 ns                ;
; N/A                                     ; 140.85 MHz ( period = 7.100 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a7~porta_address_reg1  ; clk        ; clk      ; None                        ; None                      ; 6.778 ns                ;
; N/A                                     ; 140.85 MHz ( period = 7.100 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a7~porta_address_reg2  ; clk        ; clk      ; None                        ; None                      ; 6.778 ns                ;
; N/A                                     ; 140.85 MHz ( period = 7.100 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a7~porta_address_reg3  ; clk        ; clk      ; None                        ; None                      ; 6.778 ns                ;
; N/A                                     ; 140.85 MHz ( period = 7.100 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a7~porta_address_reg4  ; clk        ; clk      ; None                        ; None                      ; 6.778 ns                ;
; N/A                                     ; 140.85 MHz ( period = 7.100 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a7~porta_address_reg5  ; clk        ; clk      ; None                        ; None                      ; 6.778 ns                ;
; N/A                                     ; 140.85 MHz ( period = 7.100 ns )                    ; sld_signaltap:auto_signaltap_0|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_1fk:auto_generated|safe_q[3] ; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_lji2:auto_generated|ram_block1a7~porta_address_reg6  ; clk        ; clk      ; None                        ; None                      ; 6.778 ns                ;