encoder.vhd

用VHDL编译的源代码

library ieee;
use ieee.std_logic_1164.all;
entity encoder is
  port( 
      r:in std_logic_vector(10 downto 1); 
      fst, snd:out std_logic_vector(3 downto 0)
);
end encoder; 

architecture one of encoder is
begin
process(r)
begin
if r(10)='1' then
     if r(9)='1' then snd<="1001";
     elsif r(8)='1' then snd<="1000";
     elsif r(7)='1' then snd<="0111";
     elsif r(6)='1' then snd<="0110";
     elsif r(5)='1' then snd<="0101";
     elsif r(4)='1' then snd<="0100";
     elsif r(3)='1' then snd<="0011";
     elsif r(2)='1' then snd<="0010";
     elsif r(1)='1' then snd<="0001";
     else  snd<="0000";  
     end if;
elsif r(9)='1' then
     if r(8)='1' then snd<="1000";
     elsif r(7)='1' then snd<="0111";
     elsif r(6)='1' then snd<="0110";
     elsif r(5)='1' then snd<="0101";
     elsif r(4)='1' then snd<="0100";
     elsif r(3)='1' then snd<="0011";
     elsif r(2)='1' then snd<="0010";
     elsif r(1)='1' then snd<="0001";
     else  snd<="0000";
     end if;
elsif r(8)='1' then 
     if r(7)='1' then snd<="0111";
     elsif r(6)='1' then snd<="0110";
     elsif r(5)='1' then snd<="0101";
     elsif r(4)='1' then snd<="0100";
     elsif r(3)='1' then snd<="0011";
     elsif r(2)='1' then snd<="0010";
     elsif r(1)='1' then snd<="0001";
     else  snd<="0000";
     end if;
elsif r(7)='1' then
     if r(6)='1' then snd<="0110";
     elsif r(5)='1' then snd<="0101";
     elsif r(4)='1' then snd<="0100";
     elsif r(3)='1' then snd<="0011";
     elsif r(2)='1' then snd<="0010";
     elsif r(1)='1' then snd<="0001";
     else  snd<="0000";
     end if;
elsif r(6)='1' then
     if r(5)='1' then snd<="0101";
     elsif r(4)='1' then snd<="0100";
     elsif r(3)='1' then snd<="0011";
     elsif r(2)='1' then snd<="0010";
     elsif r(1)='1' then snd<="0001";
     else  snd<="0000";
     end if;
elsif r(5)='1' then
     if r(4)='1' then snd<="0100";
     elsif r(3)='1' then snd<="0011";
     elsif r(2)='1' then snd<="0010";
     elsif r(1)='1' then snd<="0001";
     else  snd<="0000";
     end if;
elsif r(4)='1' then
     if r(3)='1' then snd<="0011";
     elsif r(2)='1' then snd<="0010";
     elsif r(1)='1' then snd<="0001";
     else  snd<="0000";
     end if;
elsif r(3)='1' then
     if r(2)='1' then snd<="0010";
     elsif r(1)='1' then snd<="0001";
     else  snd<="0000";
     end if;
elsif r(2)='1' then
     if r(1)='1' then snd<="0001";
     else  snd<="0000";
     end if;
else snd<="0000";
end if;
if (r(10)='1') then fst<="1010";    
elsif (r(9)='1') then fst<="1001";     
elsif (r(8)='1') then fst<="1000";     
elsif (r(7)='1') then fst<="0111";     
elsif (r(6)='1') then fst<="0110";     
elsif (r(5)='1') then fst<="0101";     
elsif (r(4)='1') then fst<="0100";     
elsif (r(3)='1') then fst<="0011";    
elsif (r(2)='1') then fst<="0010";
else  fst<="0000";
end if;
end process;
end one;