fourbitincrement.map.qmsg
来自「用VHDL编译的源代码」· QMSG 代码 · 共 12 行
QMSG
12 行
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Web Edition " "Info: Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 25 05:24:31 2008 " "Info: Processing started: Thu Sep 25 05:24:31 2008" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off fourbitincrement -c fourbitincrement " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off fourbitincrement -c fourbitincrement" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "fourbitincrement.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file fourbitincrement.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 fourbitincrement-one " "Info: Found design unit 1: fourbitincrement-one" { } { { "fourbitincrement.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/fourbitincrement/fourbitincrement.vhd" 11 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 fourbitincrement " "Info: Found entity 1: fourbitincrement" { } { { "fourbitincrement.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/fourbitincrement/fourbitincrement.vhd" 4 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "fourbitincrement " "Info: Elaborating entity \"fourbitincrement\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "xnor2.vhd 2 1 " "Warning: Using design file xnor2.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 xnor2-one " "Info: Found design unit 1: xnor2-one" { } { { "xnor2.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/fourbitincrement/xnor2.vhd" 10 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 xnor2 " "Info: Found entity 1: xnor2" { } { { "xnor2.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/fourbitincrement/xnor2.vhd" 3 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0} } { } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "xnor2 xnor2:u5 " "Info: Elaborating entity \"xnor2\" for hierarchy \"xnor2:u5\"" { } { { "fourbitincrement.vhd" "u5" { Text "C:/Documents and Settings/xie/桌面/VHDL/fourbitincrement/fourbitincrement.vhd" 28 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "onebitincrement.vhd 2 1 " "Warning: Using design file onebitincrement.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 onebitincrement-one " "Info: Found design unit 1: onebitincrement-one" { } { { "onebitincrement.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/fourbitincrement/onebitincrement.vhd" 10 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 onebitincrement " "Info: Found entity 1: onebitincrement" { } { { "onebitincrement.vhd" "" { Text "C:/Documents and Settings/xie/桌面/VHDL/fourbitincrement/onebitincrement.vhd" 3 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0} } { } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "onebitincrement onebitincrement:u1 " "Info: Elaborating entity \"onebitincrement\" for hierarchy \"onebitincrement:u1\"" { } { { "fourbitincrement.vhd" "u1" { Text "C:/Documents and Settings/xie/桌面/VHDL/fourbitincrement/fourbitincrement.vhd" 29 0 0 } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "11 " "Info: Implemented 11 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "4 " "Info: Implemented 4 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_OPINS" "4 " "Info: Implemented 4 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_LCELLS" "3 " "Info: Implemented 3 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 0} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 2 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "172 " "Info: Peak virtual memory: 172 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 25 05:24:38 2008 " "Info: Processing ended: Thu Sep 25 05:24:38 2008" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Info: Elapsed time: 00:00:07" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:03 " "Info: Total CPU time (on all processors): 00:00:03" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}
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