xnor2.vhd

用VHDL编译的源代码

library ieee;
use ieee.std_logic_1164.all;
entity xnor2 is
port(
      a,b: in std_logic;
      c: out std_logic
   );
end xnor2;

architecture one of xnor2 is
begin
c<=a XNOR b;
end one;