bin2led2.txt

用VHDL编译的源代码

library ieee;
use ieee.std_logic_1164.all;
entity bin2led2 is
   port(
      bin2: in std_logic_vector(3 downto 0);
      sseg2: out std_logic_vector(6 downto 0)
   );
end bin2led2;

architecture arch of bin2led2 is
begin
   with bin2 select
      sseg2 <=
         "1111001" when "0000",
         "1001111" when "0001",
         "1111111" when "0010",
         "1111111" when others; 
end arch;